Building the Beta

When entering numeric values in the answer fields, you can use integers (1000, 0x3E8, 0b1111101000), floating-point numbers (1000.0), scientific notation (1e3), engineering scale factors (1K), or numeric expressions (3*300 + 100).

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Problem 1. Beta Control ROM

For each of the following potential additions to the Beta instruction set, fill in the table with the control signal settings needed to execute these instructions on an unpipelined Beta. Assume the standard Beta datapath and control signals. Please choose "don't care" if the value of control signal doesn't matter when executing the instruction.

  1. Swap register contents with memory location
    Usage:     MSWP (Ra, literal, Rc)
    Operation: PC <- PC + 4
               EA <- Reg[Ra] + SEXT(literal)
               tmp <- Mem[EA]
               Mem[EA] <- Reg[Rc]
               Reg[Rc] <- tmp
    don't care adder unit: A + B adder unit: A - B boole unit: A AND B boole unit: A OR B boole unit: A XOR B boole unit: NOT A boole unit: select A operand boole unit: select B operand shift unit: SHL shift unit: SHR shift unit: SRA compare unit: CMPEQ compare unit: CMPLT compare unit: CMPLE don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 2 3 4 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 2 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1

  2. Move if zero
    Usage:     MVZ (Ra, Rb, Rc)
    Operation: PC <- PC + 4
               if Reg[Ra] == 0 then Reg[Rc] <- Reg[Rb]
    don't care adder unit: A + B adder unit: A - B boole unit: A AND B boole unit: A OR B boole unit: A XOR B boole unit: NOT A boole unit: select A operand boole unit: select B operand shift unit: SHL shift unit: SHR shift unit: SRA compare unit: CMPEQ compare unit: CMPLT compare unit: CMPLE don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 2 3 4 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 2 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1

  3. Move constant if zero
    Usage:     MVZ (Ra, literal, Rc)
    Operation: PC <- PC + 4
               if Reg[Ra] == 0 then Reg[Rc] <- SEXT(literal)
    don't care adder unit: A + B adder unit: A - B boole unit: A AND B boole unit: A OR B boole unit: A XOR B boole unit: NOT A boole unit: select A operand boole unit: select B operand shift unit: SHL shift unit: SHR shift unit: SRA compare unit: CMPEQ compare unit: CMPLT compare unit: CMPLE don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 2 3 4 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 2 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1

  4. Load indexed
    Usage:     LDX (Ra, Rb, Rc)
    Operation: PC <- PC + 4
               Reg[Rc] <- Mem[Reg[Ra] + Reg[Rb]]
    don't care adder unit: A + B adder unit: A - B boole unit: A AND B boole unit: A OR B boole unit: A XOR B boole unit: NOT A boole unit: select A operand boole unit: select B operand shift unit: SHL shift unit: SHR shift unit: SRA compare unit: CMPEQ compare unit: CMPLT compare unit: CMPLE don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 2 3 4 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 2 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1

Problem 2. New ALU!

Ben Bitdiddle has proposed changing the adder unit of the Beta ALU as shown in the following diagram. His goal is to use the adder unit to compute more than just "A+B" and "A-B". The changes include one additional inverter and three additional 2-input NAND gates for each bit of the adder unit. The "x32" appearing inside the gate icons indicates that those gates are replicated 32 times to handle all 32 bits of incoming data.

  1. For each of the eight possible values of the three control bits OP[2:0] indicate what operation the revised adder unit will perform. A B A+B A-B A+1 B+1 A-1 B-1 A+B+1 A+B-1 A-B+1 A-B-1 none of the above A B A+B A-B A+1 B+1 A-1 B-1 A+B+1 A+B-1 A-B+1 A-B-1 none of the above A B A+B A-B A+1 B+1 A-1 B-1 A+B+1 A+B-1 A-B+1 A-B-1 none of the above A B A+B A-B A+1 B+1 A-1 B-1 A+B+1 A+B-1 A-B+1 A-B-1 none of the above A B A+B A-B A+1 B+1 A-1 B-1 A+B+1 A+B-1 A-B+1 A-B-1 none of the above A B A+B A-B A+1 B+1 A-1 B-1 A+B+1 A+B-1 A-B+1 A-B-1 none of the above A B A+B A-B A+1 B+1 A-1 B-1 A+B+1 A+B-1 A-B+1 A-B-1 none of the above A B A+B A-B A+1 B+1 A-1 B-1 A+B+1 A+B-1 A-B+1 A-B-1 none of the above

  2. To show off the capabilities of his new adder unit, Ben proposes adding a LOOP instruction which combines branching and decrementing in a single instruction. Ben's theory is that the SUB/BNE instructions that appear at the end of a FOR-loop can be combined into a single LOOP instruction. Here's his definition for LOOP:
    Usage:     LOOP(Ra, label, Rc)
    Operation: literal = ((OFFSET(label) - OFFSET(current inst))/4) - 1
               PC <- PC + 4
               EA <- PC + 4*SEXT(literal)
               tmp <- Reg[Ra]
               Reg[Rc] <- Reg[Ra] - 1
               if tmp != 0 then PC <- EA 
    The LOOP instruction behaves like a BNE in the sense that it branches if Reg[Ra] is not zero. But instead of saving the PC of the following instruction in Rc, Reg[Ra]-1 is stored in Rc instead. The destination of the branch is determined as for all branches: the literal field of the instruction is treated as a word offset, so it is sign-extended, multiplied by four and added to PC+4 to produce a new value for the PC. Usually Ra and Rc specify the same register.

    Consider the following instruction sequence:

    loop: ADD(R1,R2,R3)
          LOOP(R4,loop,R4)
          ...
    Suppose R4 is initialized to 8 and then the two-instruction sequence shown above is executed.

  3. Fill in the table with the control signal settings needed to execute the LOOP instruction on an unpipelined Beta that includes Ben's new adder unit. Please choose "don't care" if the value of control signal doesn't matter when executing LOOP.; don't care adder unit: A + B adder unit: A - B adder unit: A adder unit: A + 1 adder unit: A - 1 adder unit: A + B + 1 adder unit: A - B - 1 boole unit: A AND B boole unit: A OR B boole unit: A XOR B boole unit: NOT A boole unit: select A operand boole unit: select B operand shift unit: SHL shift unit: SHR shift unit: SRA compare unit: CMPEQ compare unit: CMPLT compare unit: CMPLE don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 2 3 4 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1 don't care 0 1 2 don't care 0 1 if Reg[Ra]==0 then 1 else 0 if Reg[Ra]==0 then 0 else 1

Problem 3. Design Problem: Building the Beta

See the instructions below.

Use the Jade instance below to enter your design. To complete this design problem, select the /beta/test module and click in the Jade toolbar and the built-in tester will either report any discrepencies between the expected and actual outputs, or, if your design is correct, it will record the test passed. { "hierarchical": "true", "required_tests": ["327ee733491d310e278d231ad43f4abc"], "parts": ["/gates/.*","/alu/.*","/beta/.*","memory","/user/.*"], "tools": ["check"], "editors": ["schematic","icon","test"], "edit": "/beta/test", "initial_state": { "/alu/arith":{"properties":{"icon-readonly":"true","test-readonly":"true","name":{"label":"Name","type":"string","value":"","edit":"yes","choices":[""]},"test-readonly":{"label":"Test readonly","type":"string","value":"true","edit":"yes","choices":[""]}},"schematic":[["port",[56,-80,0],{"signal":"A[31:0]"}],["port",[56,-64,0],{"signal":"B[31:0]"}],["port",[56,-48,0],{"signal":"AFN"}],["port",[144,-32,4],{"signal":"S[31:0]","direction":"out"}],["port",[144,-48,4],{"signal":"V","direction":"out"}],["port",[144,-64,4],{"signal":"N","direction":"out"}],["port",[144,-80,4],{"signal":"Z","direction":"out"}],["wire",[136,-80,0,-8,0],{"signal":"0'1"}],["wire",[136,-64,0,-8,0],{"signal":"0'1"}],["wire",[136,-48,0,-8,0],{"signal":"0'1"}],["wire",[136,-32,0,-8,0],{"signal":"0'32"}],["jumper",[136,-80,0]],["jumper",[136,-64,0]],["jumper",[136,-48,0]],["jumper",[136,-32,0]]],"icon":[["text",[0,-11,0],{"text":"ARITH","font":"bold 6pt sans-serif","align":"center"}],["terminal",[-32,0,0],{"name":"A[31:0]"}],["terminal",[-32,8,0],{"name":"B[31:0]"}],["terminal",[-32,16,0],{"name":"AFN"}],["terminal",[32,0,4],{"name":"S[31:0]"}],["text",[-23,8,0],{"text":"B[31:0]","font":"4pt sans-serif"}],["text",[-23,0,0],{"text":"A[31:0]","font":"4pt sans-serif"}],["text",[-23,16,0],{"text":"AFN","font":"4pt sans-serif"}],["text",[23,0,0],{"text":"S[31:0]","font":"4pt sans-serif","align":"center-right"}],["line",[-24,-16,0,48,0]],["line",[24,32,0,-48,0]],["property",[0,-17,0],{"format":"{name}","align":"bottom-center"}],["terminal",[-16,40,5],{"name":"Z"}],["terminal",[0,40,5],{"name":"V"}],["terminal",[16,40,5],{"name":"N"}],["text",[-16,31,0],{"text":"Z","font":"4pt sans-serif","align":"bottom-center"}],["text",[0,31,0],{"text":"V","font":"4pt sans-serif","align":"bottom-center"}],["text",[16,31,0],{"text":"N","font":"4pt sans-serif","align":"bottom-center"}],["line",[-24,-16,0,0,48]],["line",[24,-16,0,0,48]]],"test":[["test",".power Vdd=1\n.thresholds Vol=0 Vil=0.1 Vih=0.9 Voh=1\n\n.group inputs AFN A[31:0] B[31:0]\n.group outputs S[31:0] Z V N\n\n.mode gate\n\n.cycle assert inputs tran 99n sample outputs tran 1n\n\n0 00000000000000000000000000000000 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 1: afn=0, a=0X00000000, b=0X00000000, s=0X00000000\n0 00000000000000000000000000000000 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLL // 2: afn=0, a=0X00000000, b=0X00000001, s=0X00000001\n0 00000000000000000000000000000000 11111111111111111111111111111111 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 3: afn=0, a=0X00000000, b=0XFFFFFFFF, s=0XFFFFFFFF\n0 00000000000000000000000000000000 10101010101010101010101010101010 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL LLH // 4: afn=0, a=0X00000000, b=0XAAAAAAAA, s=0XAAAAAAAA\n0 00000000000000000000000000000000 01010101010101010101010101010101 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH LLL // 5: afn=0, a=0X00000000, b=0X55555555, s=0X55555555\n0 00000000000000000000000000000001 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLL // 6: afn=0, a=0X00000001, b=0X00000000, s=0X00000001\n0 00000000000000000000000000000001 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHL LLL // 7: afn=0, a=0X00000001, b=0X00000001, s=0X00000002\n0 00000000000000000000000000000001 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 8: afn=0, a=0X00000001, b=0XFFFFFFFF, s=0X00000000\n0 00000000000000000000000000000001 10101010101010101010101010101010 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHH LLH // 9: afn=0, a=0X00000001, b=0XAAAAAAAA, s=0XAAAAAAAB\n0 00000000000000000000000000000001 01010101010101010101010101010101 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHHL LLL // 10: afn=0, a=0X00000001, b=0X55555555, s=0X55555556\n0 11111111111111111111111111111111 00000000000000000000000000000000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 11: afn=0, a=0XFFFFFFFF, b=0X00000000, s=0XFFFFFFFF\n0 11111111111111111111111111111111 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 12: afn=0, a=0XFFFFFFFF, b=0X00000001, s=0X00000000\n0 11111111111111111111111111111111 11111111111111111111111111111111 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHL LLH // 13: afn=0, a=0XFFFFFFFF, b=0XFFFFFFFF, s=0XFFFFFFFE\n0 11111111111111111111111111111111 10101010101010101010101010101010 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLLH LLH // 14: afn=0, a=0XFFFFFFFF, b=0XAAAAAAAA, s=0XAAAAAAA9\n0 11111111111111111111111111111111 01010101010101010101010101010101 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLL LLL // 15: afn=0, a=0XFFFFFFFF, b=0X55555555, s=0X55555554\n0 10101010101010101010101010101010 00000000000000000000000000000000 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL LLH // 16: afn=0, a=0XAAAAAAAA, b=0X00000000, s=0XAAAAAAAA\n0 10101010101010101010101010101010 00000000000000000000000000000001 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHH LLH // 17: afn=0, a=0XAAAAAAAA, b=0X00000001, s=0XAAAAAAAB\n0 10101010101010101010101010101010 11111111111111111111111111111111 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLLH LLH // 18: afn=0, a=0XAAAAAAAA, b=0XFFFFFFFF, s=0XAAAAAAA9\n0 10101010101010101010101010101010 10101010101010101010101010101010 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLL LHL // 19: afn=0, a=0XAAAAAAAA, b=0XAAAAAAAA, s=0X55555554\n0 10101010101010101010101010101010 01010101010101010101010101010101 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 20: afn=0, a=0XAAAAAAAA, b=0X55555555, s=0XFFFFFFFF\n0 01010101010101010101010101010101 00000000000000000000000000000000 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH LLL // 21: afn=0, a=0X55555555, b=0X00000000, s=0X55555555\n0 01010101010101010101010101010101 00000000000000000000000000000001 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHHL LLL // 22: afn=0, a=0X55555555, b=0X00000001, s=0X55555556\n0 01010101010101010101010101010101 11111111111111111111111111111111 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLL LLL // 23: afn=0, a=0X55555555, b=0XFFFFFFFF, s=0X55555554\n0 01010101010101010101010101010101 10101010101010101010101010101010 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 24: afn=0, a=0X55555555, b=0XAAAAAAAA, s=0XFFFFFFFF\n0 01010101010101010101010101010101 01010101010101010101010101010101 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL LHH // 25: afn=0, a=0X55555555, b=0X55555555, s=0XAAAAAAAA\n1 00000000000000000000000000000000 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 26: fn=1, a=0X00000000, b=0X00000000, s=0X00000000\n1 00000000000000000000000000000000 00000000000000000000000000000001 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 27: fn=1, a=0X00000000, b=0X00000001, s=0XFFFFFFFF\n1 00000000000000000000000000000000 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLL // 28: fn=1, a=0X00000000, b=0XFFFFFFFF, s=0X00000001\n1 00000000000000000000000000000000 10101010101010101010101010101010 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHHL LLL // 29: fn=1, a=0X00000000, b=0XAAAAAAAA, s=0X55555556\n1 00000000000000000000000000000000 01010101010101010101010101010101 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHH LLH // 30: fn=1, a=0X00000000, b=0X55555555, s=0XAAAAAAAB\n1 00000000000000000000000000000001 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLL // 31: fn=1, a=0X00000001, b=0X00000000, s=0X00000001\n1 00000000000000000000000000000001 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 32: fn=1, a=0X00000001, b=0X00000001, s=0X00000000\n1 00000000000000000000000000000001 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHL LLL // 33: fn=1, a=0X00000001, b=0XFFFFFFFF, s=0X00000002\n1 00000000000000000000000000000001 10101010101010101010101010101010 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHHH LLL // 34: fn=1, a=0X00000001, b=0XAAAAAAAA, s=0X55555557\n1 00000000000000000000000000000001 01010101010101010101010101010101 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHHLL LLH // 35: fn=1, a=0X00000001, b=0X55555555, s=0XAAAAAAAC\n1 11111111111111111111111111111111 00000000000000000000000000000000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 36: fn=1, a=0XFFFFFFFF, b=0X00000000, s=0XFFFFFFFF\n1 11111111111111111111111111111111 00000000000000000000000000000001 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHL LLH // 37: fn=1, a=0XFFFFFFFF, b=0X00000001, s=0XFFFFFFFE\n1 11111111111111111111111111111111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 38: fn=1, a=0XFFFFFFFF, b=0XFFFFFFFF, s=0X00000000\n1 11111111111111111111111111111111 10101010101010101010101010101010 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH LLL // 39: fn=1, a=0XFFFFFFFF, b=0XAAAAAAAA, s=0X55555555\n1 11111111111111111111111111111111 01010101010101010101010101010101 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL LLH // 40: fn=1, a=0XFFFFFFFF, b=0X55555555, s=0XAAAAAAAA\n1 10101010101010101010101010101010 00000000000000000000000000000000 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL LLH // 41: fn=1, a=0XAAAAAAAA, b=0X00000000, s=0XAAAAAAAA\n1 10101010101010101010101010101010 00000000000000000000000000000001 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLLH LLH // 42: fn=1, a=0XAAAAAAAA, b=0X00000001, s=0XAAAAAAA9\n1 10101010101010101010101010101010 11111111111111111111111111111111 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHH LLH // 43: fn=1, a=0XAAAAAAAA, b=0XFFFFFFFF, s=0XAAAAAAAB\n1 10101010101010101010101010101010 10101010101010101010101010101010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 44: fn=1, a=0XAAAAAAAA, b=0XAAAAAAAA, s=0X00000000\n1 10101010101010101010101010101010 01010101010101010101010101010101 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH LHL // 45: fn=1, a=0XAAAAAAAA, b=0X55555555, s=0X55555555\n1 01010101010101010101010101010101 00000000000000000000000000000000 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH LLL // 46: fn=1, a=0X55555555, b=0X00000000, s=0X55555555\n1 01010101010101010101010101010101 00000000000000000000000000000001 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLL LLL // 47: fn=1, a=0X55555555, b=0X00000001, s=0X55555554\n1 01010101010101010101010101010101 11111111111111111111111111111111 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHHL LLL // 48: fn=1, a=0X55555555, b=0XFFFFFFFF, s=0X55555556\n1 01010101010101010101010101010101 10101010101010101010101010101010 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHH LHH // 49: fn=1, a=0X55555555, b=0XAAAAAAAA, s=0XAAAAAAAB\n1 01010101010101010101010101010101 01010101010101010101010101010101 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 50: fn=1, a=0X55555555, b=0X55555555, s=0X00000000\n1 01111111111111111111111111111111 11111111111111111111111111111111 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LHH // 51: fn=1, a=0X7FFFFFFF, b=0XFFFFFFFF, s=0X80000000\n1 00111111111111111111111111111111 11111111111111111111111111111111 LHLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 52: fn=1, a=0X3FFFFFFF, b=0XFFFFFFFF, s=0X40000000\n1 00011111111111111111111111111111 11111111111111111111111111111111 LLHLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 53: fn=1, a=0X1FFFFFFF, b=0XFFFFFFFF, s=0X20000000\n1 00001111111111111111111111111111 11111111111111111111111111111111 LLLHLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 54: fn=1, a=0X0FFFFFFF, b=0XFFFFFFFF, s=0X10000000\n1 00000111111111111111111111111111 11111111111111111111111111111111 LLLLHLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 55: fn=1, a=0X07FFFFFF, b=0XFFFFFFFF, s=0X08000000\n1 00000011111111111111111111111111 11111111111111111111111111111111 LLLLLHLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 56: fn=1, a=0X03FFFFFF, b=0XFFFFFFFF, s=0X04000000\n1 00000001111111111111111111111111 11111111111111111111111111111111 LLLLLLHLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 57: fn=1, a=0X01FFFFFF, b=0XFFFFFFFF, s=0X02000000\n1 00000000111111111111111111111111 11111111111111111111111111111111 LLLLLLLHLLLLLLLLLLLLLLLLLLLLLLLL LLL // 58: fn=1, a=0X00FFFFFF, b=0XFFFFFFFF, s=0X01000000\n1 00000000011111111111111111111111 11111111111111111111111111111111 LLLLLLLLHLLLLLLLLLLLLLLLLLLLLLLL LLL // 59: fn=1, a=0X007FFFFF, b=0XFFFFFFFF, s=0X00800000\n1 00000000001111111111111111111111 11111111111111111111111111111111 LLLLLLLLLHLLLLLLLLLLLLLLLLLLLLLL LLL // 60: fn=1, a=0X003FFFFF, b=0XFFFFFFFF, s=0X00400000\n1 00000000000111111111111111111111 11111111111111111111111111111111 LLLLLLLLLLHLLLLLLLLLLLLLLLLLLLLL LLL // 61: fn=1, a=0X001FFFFF, b=0XFFFFFFFF, s=0X00200000\n1 00000000000011111111111111111111 11111111111111111111111111111111 LLLLLLLLLLLHLLLLLLLLLLLLLLLLLLLL LLL // 62: fn=1, a=0X000FFFFF, b=0XFFFFFFFF, s=0X00100000\n1 00000000000001111111111111111111 11111111111111111111111111111111 LLLLLLLLLLLLHLLLLLLLLLLLLLLLLLLL LLL // 63: fn=1, a=0X0007FFFF, b=0XFFFFFFFF, s=0X00080000\n1 00000000000000111111111111111111 11111111111111111111111111111111 LLLLLLLLLLLLLHLLLLLLLLLLLLLLLLLL LLL // 64: fn=1, a=0X0003FFFF, b=0XFFFFFFFF, s=0X00040000\n1 00000000000000011111111111111111 11111111111111111111111111111111 LLLLLLLLLLLLLLHLLLLLLLLLLLLLLLLL LLL // 65: fn=1, a=0X0001FFFF, b=0XFFFFFFFF, s=0X00020000\n1 00000000000000001111111111111111 11111111111111111111111111111111 LLLLLLLLLLLLLLLHLLLLLLLLLLLLLLLL LLL // 66: fn=1, a=0X0000FFFF, b=0XFFFFFFFF, s=0X00010000\n1 00000000000000000111111111111111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLHLLLLLLLLLLLLLLL LLL // 67: fn=1, a=0X00007FFF, b=0XFFFFFFFF, s=0X00008000\n1 00000000000000000011111111111111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLHLLLLLLLLLLLLLL LLL // 68: fn=1, a=0X00003FFF, b=0XFFFFFFFF, s=0X00004000\n1 00000000000000000001111111111111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLHLLLLLLLLLLLLL LLL // 69: fn=1, a=0X00001FFF, b=0XFFFFFFFF, s=0X00002000\n1 00000000000000000000111111111111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLHLLLLLLLLLLLL LLL // 70: fn=1, a=0X00000FFF, b=0XFFFFFFFF, s=0X00001000\n1 00000000000000000000011111111111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLHLLLLLLLLLLL LLL // 71: fn=1, a=0X000007FF, b=0XFFFFFFFF, s=0X00000800\n1 00000000000000000000001111111111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLHLLLLLLLLLL LLL // 72: fn=1, a=0X000003FF, b=0XFFFFFFFF, s=0X00000400\n1 00000000000000000000000111111111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLHLLLLLLLLL LLL // 73: fn=1, a=0X700001FF, b=0XFFFFFFFF, s=0X00000200\n1 00000000000000000000000011111111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLHLLLLLLLL LLL // 74: fn=1, a=0X000000FF, b=0XFFFFFFFF, s=0X00000100\n1 00000000000000000000000001111111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLHLLLLLLL LLL // 75: fn=1, a=0X0000007F, b=0XFFFFFFFF, s=0X00000080\n1 00000000000000000000000000111111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLHLLLLLL LLL // 76: fn=1, a=0X0000003F, b=0XFFFFFFFF, s=0X00000040\n1 00000000000000000000000000011111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLLHLLLLL LLL // 77: fn=1, a=0X0000001F, b=0XFFFFFFFF, s=0X00000020\n1 00000000000000000000000000001111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLL LLL // 78: fn=1, a=0X0000000F, b=0XFFFFFFFF, s=0X00000010\n1 00000000000000000000000000000111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLL LLL // 79: fn=1, a=0X00000007, b=0XFFFFFFFF, s=0X00000008\n1 00000000000000000000000000000011 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LLL // 80: fn=1, a=0X00000003, b=0XFFFFFFFF, s=0X00000004\n1 00000000000000000000000000000001 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHL LLL // 81: fn=1, a=0X00000001, b=0XFFFFFFFF, s=0X00000002\n1 00000000000000000000000000000000 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLL // 82: fn=1, a=0X00000000, b=0XFFFFFFFF, s=0X00000001\n \n.plot X(AFN)\n.plot X(A[31:0])\n.plot X(B[31:0])\n.plot X(S[31:0])\n.plot Z\n.plot V\n.plot N\n"]]}, "/alu/bool":{"properties":{"icon-readonly":"true","test-readonly":"true","name":{"label":"Name","type":"string","value":"","edit":"yes","choices":[""]},"test-readonly":{"label":"Test readonly","type":"string","value":"true","edit":"yes","choices":[""]}},"test":[["test",".power Vdd=1\n.thresholds Vol=0 Vil=0.1 Vih=0.9 Voh=1\n\n.group inputs BFN[3:0] A[31:0] B[31:0]\n.group outputs Y[31:0]\n\n.mode gate\n\n.cycle assert inputs tran 99n sample outputs tran 1n\n\n0000 11111111000000001111111100000000 11111111111111110000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 1: bfn=0b0000, a=0XFF00FF00, b=0XFFFF0000, y=0X00000000\n0001 11111111000000001111111100000000 11111111111111110000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLHHHHHHHH // 2: bfn=0b0001, a=0XFF00FF00, b=0XFFFF0000, y=0X000000FF\n0010 11111111000000001111111100000000 11111111111111110000000000000000 LLLLLLLLLLLLLLLLHHHHHHHHLLLLLLLL // 3: bfn=0b0010, a=0XFF00FF00, b=0XFFFF0000, y=0X0000FF00\n0011 11111111000000001111111100000000 11111111111111110000000000000000 LLLLLLLLLLLLLLLLHHHHHHHHHHHHHHHH // 4: bfn=0b0011, a=0XFF00FF00, b=0XFFFF0000, y=0X0000FFFF\n0100 11111111000000001111111100000000 11111111111111110000000000000000 LLLLLLLLHHHHHHHHLLLLLLLLLLLLLLLL // 5: bfn=0b0100, a=0XFF00FF00, b=0XFFFF0000, y=0X00FF0000\n0101 11111111000000001111111100000000 11111111111111110000000000000000 LLLLLLLLHHHHHHHHLLLLLLLLHHHHHHHH // 6: bfn=0b0101, a=0XFF00FF00, b=0XFFFF0000, y=0X00FF00FF\n0110 11111111000000001111111100000000 11111111111111110000000000000000 LLLLLLLLHHHHHHHHHHHHHHHHLLLLLLLL // 7: bfn=0b0110, a=0XFF00FF00, b=0XFFFF0000, y=0X00FFFF00\n0111 11111111000000001111111100000000 11111111111111110000000000000000 LLLLLLLLHHHHHHHHHHHHHHHHHHHHHHHH // 8: bfn=0b0111, a=0XFF00FF00, b=0XFFFF0000, y=0X00FFFFFF\n1000 11111111000000001111111100000000 11111111111111110000000000000000 HHHHHHHHLLLLLLLLLLLLLLLLLLLLLLLL // 9: bfn=0b1000, a=0XFF00FF00, b=0XFFFF0000, y=0XFF000000\n1001 11111111000000001111111100000000 11111111111111110000000000000000 HHHHHHHHLLLLLLLLLLLLLLLLHHHHHHHH // 10: bfn=0b1001, a=0XFF00FF00, b=0XFFFF0000, y=0XFF0000FF\n1010 11111111000000001111111100000000 11111111111111110000000000000000 HHHHHHHHLLLLLLLLHHHHHHHHLLLLLLLL // 11: bfn=0b1010, a=0XFF00FF00, b=0XFFFF0000, y=0XFF00FF00\n1011 11111111000000001111111100000000 11111111111111110000000000000000 HHHHHHHHLLLLLLLLHHHHHHHHHHHHHHHH // 12: bfn=0b1011, a=0XFF00FF00, b=0XFFFF0000, y=0XFF00FFFF\n1100 11111111000000001111111100000000 11111111111111110000000000000000 HHHHHHHHHHHHHHHHLLLLLLLLLLLLLLLL // 13: bfn=0b1100, a=0XFF00FF00, b=0XFFFF0000, y=0XFFFF0000\n1101 11111111000000001111111100000000 11111111111111110000000000000000 HHHHHHHHHHHHHHHHLLLLLLLLHHHHHHHH // 14: bfn=0b1101, a=0XFF00FF00, b=0XFFFF0000, y=0XFFFF00FF\n1110 11111111000000001111111100000000 11111111111111110000000000000000 HHHHHHHHHHHHHHHHHHHHHHHHLLLLLLLL // 15: bfn=0b1110, a=0XFF00FF00, b=0XFFFF0000, y=0XFFFFFF00\n1111 11111111000000001111111100000000 11111111111111110000000000000000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH // 16: bfn=0b1111, a=0XFF00FF00, b=0XFFFF0000, y=0XFFFFFFFF\n \n.plot X(BFN[3:0])\n.plot X(A[31:0])\n.plot X(B[31:0])\n.plot X(Y[31:0])\n"]],"schematic":[["port",[0,-72,4],{"signal":"Y[31:0]","direction":"out"}],["port",[-88,-56,0],{"signal":"BFN[3:0]"}],["port",[-88,-72,0],{"signal":"B[31:0]"}],["port",[-88,-88,0],{"signal":"A[31:0]"}],["wire",[-8,-72,0,-8,0],{"signal":"0'32"}],["jumper",[-8,-72,0]]],"icon":[["text",[0,-3,0],{"text":"BOOL","font":"bold 6pt sans-serif","align":"center"}],["terminal",[-32,8,0],{"name":"A[31:0]"}],["terminal",[-32,16,0],{"name":"B[31:0]"}],["terminal",[-32,24,0],{"name":"BFN[3:0]"}],["terminal",[32,8,4],{"name":"Y[31:0]"}],["text",[-23,16,0],{"text":"B[31:0]","font":"4pt sans-serif"}],["text",[-23,8,0],{"text":"A[31:0]","font":"4pt sans-serif"}],["text",[-23,24,0],{"text":"BFN[3:0]","font":"4pt sans-serif"}],["text",[23,8,0],{"text":"Y[31:0]","font":"4pt sans-serif","align":"center-right"}],["line",[-24,-8,0,48,0]],["line",[24,32,0,-48,0]],["property",[0,-9,0],{"format":"{name}","align":"bottom-center"}],["line",[-24,-8,0,0,40]],["line",[24,-8,0,0,40]]]}, "/alu/FA":{"properties":{"icon-readonly":"true","test-readonly":"true","name":{"edit":"yes","type":"name","value":"","label":"Name"},"test-readonly":{"label":"Test readonly","type":"string","value":"true","edit":"yes","choices":[""]}},"schematic":[["port",[-72,-48,0],{"signal":"A"}],["port",[-72,-32,0],{"signal":"B"}],["port",[-72,-16,0],{"signal":"Cin"}],["port",[-8,-32,4],{"signal":"Cout","direction":"out"}],["port",[-8,-48,4],{"signal":"S","direction":"out"}]],"icon":[["terminal",[-24,-8,0],{"name":"A"}],["terminal",[-24,8,0],{"name":"B"}],["terminal",[0,32,3],{"name":"Cin"}],["terminal",[24,0,4],{"name":"S"}],["terminal",[0,-32,7],{"name":"Cout"}],["line",[16,-24,0,-32,0]],["line",[-16,24,0,32,0]],["text",[-15,-8,0],{"text":"A","font":"4pt sans-serif"}],["text",[-15,8,0],{"text":"B","font":"4pt sans-serif"}],["text",[15,0,0],{"text":"S","font":"4pt sans-serif","align":"center-right"}],["text",[0,-23,0],{"text":"Cout","font":"4pt sans-serif","align":"top-center"}],["text",[0,23,0],{"text":"Cin","font":"4pt sans-serif","align":"bottom-center"}],["text",[0,0,0],{"text":"FA","align":"center","font":"bold 6pt sans-serif"}],["line",[-16,-24,0,0,48]],["line",[16,-24,0,0,48]]],"test":[["test",".power Vdd=1\n.thresholds Vol=0 Vil=0.1 Vih=0.9 Voh=1\n.mode gate\n\n.group inputs A B Cin\n.group outputs Cout S\n\n.cycle assert inputs tran 9n sample outputs tran 1n\n000 LL\n001 LH\n010 LH\n011 HL\n100 LH\n101 HL\n110 HL\n111 HH\n\n.plot A\n.plot B\n.plot Cin\n.plot Cout\n.plot S\n"]]}, "/alu/cmp":{"properties":{"icon-readonly":"true","test-readonly":"true","name":{"label":"Name","type":"string","value":"","edit":"yes","choices":[""]},"test-readonly":{"label":"Test readonly","type":"string","value":"true","edit":"yes","choices":[""]}},"schematic":[["port",[-56,0,0],{"signal":"V"}],["port",[-56,-16,0],{"signal":"N"}],["port",[24,-16,4],{"signal":"Y[31:1]","direction":"out"}],["port",[24,0,4],{"signal":"Y[0]","direction":"out"}],["jumper",[16,-16,0]],["wire",[16,-16,0,-8,0],{"signal":"0'31"}],["port",[-56,-32,0],{"signal":"Z"}],["port",[-56,16,0],{"signal":"CFN[1:0]"}],["jumper",[16,0,0]],["wire",[16,0,0,-8,0],{"signal":"0'1"}]],"icon":[["text",[0,19,0],{"text":"CMP","font":"bold 6pt sans-serif","align":"center"}],["terminal",[-16,-16,7],{"name":"Z"}],["terminal",[0,-16,7],{"name":"V"}],["terminal",[16,-16,7],{"name":"N"}],["terminal",[32,8,4],{"name":"Y[31:0]"}],["text",[16,-7,0],{"text":"N","font":"4pt sans-serif","align":"top-center"}],["text",[-16,-7,0],{"text":"Z","font":"4pt sans-serif","align":"top-center"}],["text",[-23,8,0],{"text":"CFN[1:0]","font":"4pt sans-serif"}],["text",[23,8,0],{"text":"Y[31:0]","font":"4pt sans-serif","align":"center-right"}],["line",[-24,-8,0,48,0]],["line",[24,24,0,-48,0]],["property",[0,25,0],{"format":"{name}","align":"top-center"}],["text",[0,-7,0],{"text":"V","font":"4pt sans-serif","align":"top-center"}],["terminal",[-32,8,0],{"name":"CFN[1:0]"}],["line",[-24,-8,0,0,32]],["line",[24,-8,0,0,32]]],"test":[["test",".power Vdd=1\n.thresholds Vol=0 Vil=0.1 Vih=0.9 Voh=1\n\n.group inputs CFN[1:0] Z V N\n.group outputs Y[31:0]\n\n.mode gate\n\n.cycle assert inputs tran 99n sample outputs tran 1n\n\n01 000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 1: cfn=CMPEQ, z=0, v=0, n=0, y=0\n10 000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 2: cfn=CMPLT, z=0, v=0, n=0, y=0\n11 000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 3: cfn=CMPLE, z=0, v=0, n=0, y=0\n01 001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 4: cfn=CMPEQ, z=0, v=0, n=1, y=0\n10 001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 5: cfn=CMPLT, z=0, v=0, n=1, y=1\n11 001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 6: cfn=CMPLE, z=0, v=0, n=1, y=1\n01 010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 7: cfn=CMPEQ, z=0, v=1, n=0, y=0\n10 010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 8: cfn=CMPLT, z=0, v=1, n=0, y=1\n11 010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 9: cfn=CMPLE, z=0, v=1, n=0, y=1\n01 011 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 10: cfn=CMPEQ, z=0, v=1, n=1, y=0\n10 011 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 11: cfn=CMPLT, z=0, v=1, n=1, y=0\n11 011 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 12: cfn=CMPLE, z=0, v=1, n=1, y=0\n01 100 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 13: cfn=CMPEQ, z=1, v=0, n=0, y=1\n10 100 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 14: cfn=CMPLT, z=1, v=0, n=0, y=0\n11 100 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 15: cfn=CMPLE, z=1, v=0, n=0, y=1\n01 101 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 16: cfn=CMPEQ, z=1, v=0, n=1, y=1\n10 101 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 17: fn=CMPLT, z=1, v=0, n=1, y=1\n11 101 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 18: fn=CMPLE, z=1, v=0, n=1, y=1\n01 110 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 19: fn=CMPEQ, z=1, v=1, n=0, y=1\n10 110 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 20: fn=CMPLT, z=1, v=1, n=0, y=1\n11 110 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 21: fn=CMPLE, z=1, v=1, n=0, y=1\n \n.plot X(CFN[1:0])\n.plot Z\n.plot V\n.plot N\n.plot X(Y[31:0])\n"]]}, "/alu/shift":{"properties":{"icon-readonly":"true","test-readonly":"true","name":{"label":"Name","type":"string","value":"","edit":"yes","choices":[""]},"test-readonly":{"label":"Test readonly","type":"string","value":"true","edit":"yes","choices":[""]}},"schematic":[["port",[-200,-88,0],{"signal":"A[31:0]"}],["port",[-200,-72,0],{"signal":"B[4:0]"}],["port",[-200,-56,0],{"signal":"SFN[1:0]"}],["port",[-128,-72,4],{"signal":"Y[31:0]","direction":"out"}],["jumper",[-136,-72,0]],["wire",[-136,-72,0,-8,0],{"signal":"0'32"}]],"icon":[["text",[0,-11,0],{"text":"SHIFT","font":"bold 6pt sans-serif","align":"center"}],["terminal",[-32,0,0],{"name":"A[31:0]"}],["terminal",[-32,8,0],{"name":"B[4:0]"}],["terminal",[-32,16,0],{"name":"SFN[1:0]"}],["terminal",[32,0,4],{"name":"Y[31:0]"}],["text",[-23,8,0],{"text":"B[4:0]","font":"4pt sans-serif"}],["text",[-23,0,0],{"text":"A[31:0]","font":"4pt sans-serif"}],["text",[-23,16,0],{"text":"SFN[1:0]","font":"4pt sans-serif"}],["text",[23,0,0],{"text":"Y[31:0]","font":"4pt sans-serif","align":"center-right"}],["line",[-24,-16,0,48,0]],["line",[24,24,0,-48,0]],["property",[0,-17,0],{"format":"{name}","align":"bottom-center"}],["line",[-24,-16,0,0,40]],["line",[24,-16,0,0,40]]],"test":[["test",".power Vdd=1\n.thresholds Vol=0 Vil=0.1 Vih=0.9 Voh=1\n\n.group inputs SFN[1:0] A[31:0] B[4:0]\n.group outputs Y[31:0]\n\n.mode gate\n\n.cycle assert inputs tran 99n sample outputs tran 1n\n\n00 00000000000000000000000000000000 00000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 1: fn=SHL, a=0X00000000, b= 0, y=0X00000000\n01 00000000000000000000000000000000 00000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 2: fn=SHR, a=0X00000000, b= 0, y=0X00000000\n11 00000000000000000000000000000000 00000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 3: fn=SRA, a=0X00000000, b= 0, y=0X00000000\n00 00000000000000000000000000000000 00001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 4: fn=SHL, a=0X00000000, b= 1, y=0X00000000\n01 00000000000000000000000000000000 00001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 5: fn=SHR, a=0X00000000, b= 1, y=0X00000000\n11 00000000000000000000000000000000 00001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 6: fn=SRA, a=0X00000000, b= 1, y=0X00000000\n00 00000000000000000000000000000000 00010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 7: fn=SHL, a=0X00000000, b= 2, y=0X00000000\n01 00000000000000000000000000000000 00010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 8: fn=SHR, a=0X00000000, b= 2, y=0X00000000\n11 00000000000000000000000000000000 00010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 9: fn=SRA, a=0X00000000, b= 2, y=0X00000000\n00 00000000000000000000000000000000 00100 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 10: fn=SHL, a=0X00000000, b= 4, y=0X00000000\n01 00000000000000000000000000000000 00100 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 11: fn=SHR, a=0X00000000, b= 4, y=0X00000000\n11 00000000000000000000000000000000 00100 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 12: fn=SRA, a=0X00000000, b= 4, y=0X00000000\n00 00000000000000000000000000000000 01000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 13: fn=SHL, a=0X00000000, b= 8, y=0X00000000\n01 00000000000000000000000000000000 01000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 14: fn=SHR, a=0X00000000, b= 8, y=0X00000000\n11 00000000000000000000000000000000 01000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 15: fn=SRA, a=0X00000000, b= 8, y=0X00000000\n00 00000000000000000000000000000000 10000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 16: fn=SHL, a=0X00000000, b=16, y=0X00000000\n01 00000000000000000000000000000000 10000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 17: fn=SHR, a=0X00000000, b=16, y=0X00000000\n11 00000000000000000000000000000000 10000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 18: fn=SRA, a=0X00000000, b=16, y=0X00000000\n00 00000000000000000000000000000000 11111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 19: fn=SHL, a=0X00000000, b=31, y=0X00000000\n01 00000000000000000000000000000000 11111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 20: fn=SHR, a=0X00000000, b=31, y=0X00000000\n11 00000000000000000000000000000000 11111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 21: fn=SRA, a=0X00000000, b=31, y=0X00000000\n00 00000000000000000000000000000001 00000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 22: fn=SHL, a=0X00000001, b= 0, y=0X00000001\n01 00000000000000000000000000000001 00000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 23: fn=SHR, a=0X00000001, b= 0, y=0X00000001\n11 00000000000000000000000000000001 00000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 24: fn=SRA, a=0X00000001, b= 0, y=0X00000001\n00 00000000000000000000000000000001 00001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHL // 25: fn=SHL, a=0X00000001, b= 1, y=0X00000002\n01 00000000000000000000000000000001 00001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 26: fn=SHR, a=0X00000001, b= 1, y=0X00000000\n11 00000000000000000000000000000001 00001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 27: fn=SRA, a=0X00000001, b= 1, y=0X00000000\n00 00000000000000000000000000000001 00010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL // 28: fn=SHL, a=0X00000001, b= 2, y=0X00000004\n01 00000000000000000000000000000001 00010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 29: fn=SHR, a=0X00000001, b= 2, y=0X00000000\n11 00000000000000000000000000000001 00010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 30: fn=SRA, a=0X00000001, b= 2, y=0X00000000\n00 00000000000000000000000000000001 00100 LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLL // 31: fn=SHL, a=0X00000001, b= 4, y=0X00000010\n01 00000000000000000000000000000001 00100 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 32: fn=SHR, a=0X00000001, b= 4, y=0X00000000\n11 00000000000000000000000000000001 00100 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 33: fn=SRA, a=0X00000001, b= 4, y=0X00000000\n00 00000000000000000000000000000001 01000 LLLLLLLLLLLLLLLLLLLLLLLHLLLLLLLL // 34: fn=SHL, a=0X00000001, b= 8, y=0X00000100\n01 00000000000000000000000000000001 01000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 35: fn=SHR, a=0X00000001, b= 8, y=0X00000000\n11 00000000000000000000000000000001 01000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 36: fn=SRA, a=0X00000001, b= 8, y=0X00000000\n00 00000000000000000000000000000001 10000 LLLLLLLLLLLLLLLHLLLLLLLLLLLLLLLL // 37: fn=SHL, a=0X00000001, b=16, y=0X00010000\n01 00000000000000000000000000000001 10000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 38: fn=SHR, a=0X00000001, b=16, y=0X00000000\n11 00000000000000000000000000000001 10000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 39: fn=SRA, a=0X00000001, b=16, y=0X00000000\n00 00000000000000000000000000000001 11111 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 40: fn=SHL, a=0X00000001, b=31, y=0X80000000\n01 00000000000000000000000000000001 11111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 41: fn=SHR, a=0X00000001, b=31, y=0X00000000\n11 00000000000000000000000000000001 11111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 42: fn=SRA, a=0X00000001, b=31, y=0X00000000\n00 11111111111111111111111111111111 00000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH // 43: fn=SHL, a=0XFFFFFFFF, b= 0, y=0XFFFFFFFF\n01 11111111111111111111111111111111 00000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH // 44: fn=SHR, a=0XFFFFFFFF, b= 0, y=0XFFFFFFFF\n11 11111111111111111111111111111111 00000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH // 45: fn=SRA, a=0XFFFFFFFF, b= 0, y=0XFFFFFFFF\n00 11111111111111111111111111111111 00001 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHL // 46: fn=SHL, a=0XFFFFFFFF, b= 1, y=0XFFFFFFFE\n01 11111111111111111111111111111111 00001 LHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH // 47: fn=SHR, a=0XFFFFFFFF, b= 1, y=0X7FFFFFFF\n11 11111111111111111111111111111111 00001 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH // 48: fn=SRA, a=0XFFFFFFFF, b= 1, y=0XFFFFFFFF\n00 11111111111111111111111111111111 00010 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLL // 49: fn=SHL, a=0XFFFFFFFF, b= 2, y=0XFFFFFFFC\n01 11111111111111111111111111111111 00010 LLHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH // 50: fn=SHR, a=0XFFFFFFFF, b= 2, y=0X3FFFFFFF\n11 11111111111111111111111111111111 00010 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH // 51: fn=SRA, a=0XFFFFFFFF, b= 2, y=0XFFFFFFFF\n00 11111111111111111111111111111111 00100 HHHHHHHHHHHHHHHHHHHHHHHHHHHHLLLL // 52: fn=SHL, a=0XFFFFFFFF, b= 4, y=0XFFFFFFF0\n01 11111111111111111111111111111111 00100 LLLLHHHHHHHHHHHHHHHHHHHHHHHHHHHH // 53: fn=SHR, a=0XFFFFFFFF, b= 4, y=0X0FFFFFFF\n11 11111111111111111111111111111111 00100 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH // 54: fn=SRA, a=0XFFFFFFFF, b= 4, y=0XFFFFFFFF\n00 11111111111111111111111111111111 01000 HHHHHHHHHHHHHHHHHHHHHHHHLLLLLLLL // 55: fn=SHL, a=0XFFFFFFFF, b= 8, y=0XFFFFFF00\n01 11111111111111111111111111111111 01000 LLLLLLLLHHHHHHHHHHHHHHHHHHHHHHHH // 56: fn=SHR, a=0XFFFFFFFF, b= 8, y=0X00FFFFFF\n11 11111111111111111111111111111111 01000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH // 57: fn=SRA, a=0XFFFFFFFF, b= 8, y=0XFFFFFFFF\n00 11111111111111111111111111111111 10000 HHHHHHHHHHHHHHHHLLLLLLLLLLLLLLLL // 58: fn=SHL, a=0XFFFFFFFF, b=16, y=0XFFFF0000\n01 11111111111111111111111111111111 10000 LLLLLLLLLLLLLLLLHHHHHHHHHHHHHHHH // 59: fn=SHR, a=0XFFFFFFFF, b=16, y=0X0000FFFF\n11 11111111111111111111111111111111 10000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH // 60: fn=SRA, a=0XFFFFFFFF, b=16, y=0XFFFFFFFF\n00 11111111111111111111111111111111 11111 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 61: fn=SHL, a=0XFFFFFFFF, b=31, y=0X80000000\n01 11111111111111111111111111111111 11111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 62: fn=SHR, a=0XFFFFFFFF, b=31, y=0X00000001\n11 11111111111111111111111111111111 11111 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH // 63: fn=SRA, a=0XFFFFFFFF, b=31, y=0XFFFFFFFF\n00 00010010001101000101011001111000 00000 LLLHLLHLLLHHLHLLLHLHLHHLLHHHHLLL // 64: fn=SHL, a=0X12345678, b= 0, y=0X12345678\n01 00010010001101000101011001111000 00000 LLLHLLHLLLHHLHLLLHLHLHHLLHHHHLLL // 65: fn=SHR, a=0X12345678, b= 0, y=0X12345678\n11 00010010001101000101011001111000 00000 LLLHLLHLLLHHLHLLLHLHLHHLLHHHHLLL // 66: fn=SRA, a=0X12345678, b= 0, y=0X12345678\n00 00010010001101000101011001111000 00001 LLHLLHLLLHHLHLLLHLHLHHLLHHHHLLLL // 67: fn=SHL, a=0X12345678, b= 1, y=0X2468ACF0\n01 00010010001101000101011001111000 00001 LLLLHLLHLLLHHLHLLLHLHLHHLLHHHHLL // 68: fn=SHR, a=0X12345678, b= 1, y=0X091A2B3C\n11 00010010001101000101011001111000 00001 LLLLHLLHLLLHHLHLLLHLHLHHLLHHHHLL // 69: fn=SRA, a=0X12345678, b= 1, y=0X091A2B3C\n00 00010010001101000101011001111000 00010 LHLLHLLLHHLHLLLHLHLHHLLHHHHLLLLL // 70: fn=SHL, a=0X12345678, b= 2, y=0X48D159E0\n01 00010010001101000101011001111000 00010 LLLLLHLLHLLLHHLHLLLHLHLHHLLHHHHL // 71: fn=SHR, a=0X12345678, b= 2, y=0X048D159E\n11 00010010001101000101011001111000 00010 LLLLLHLLHLLLHHLHLLLHLHLHHLLHHHHL // 72: fn=SRA, a=0X12345678, b= 2, y=0X048D159E\n00 00010010001101000101011001111000 00100 LLHLLLHHLHLLLHLHLHHLLHHHHLLLLLLL // 73: fn=SHL, a=0X12345678, b= 4, y=0X23456780\n01 00010010001101000101011001111000 00100 LLLLLLLHLLHLLLHHLHLLLHLHLHHLLHHH // 74: fn=SHR, a=0X12345678, b= 4, y=0X01234567\n11 00010010001101000101011001111000 00100 LLLLLLLHLLHLLLHHLHLLLHLHLHHLLHHH // 75: fn=SRA, a=0X12345678, b= 4, y=0X01234567\n00 00010010001101000101011001111000 01000 LLHHLHLLLHLHLHHLLHHHHLLLLLLLLLLL // 76: fn=SHL, a=0X12345678, b= 8, y=0X34567800\n01 00010010001101000101011001111000 01000 LLLLLLLLLLLHLLHLLLHHLHLLLHLHLHHL // 77: fn=SHR, a=0X12345678, b= 8, y=0X00123456\n11 00010010001101000101011001111000 01000 LLLLLLLLLLLHLLHLLLHHLHLLLHLHLHHL // 78: fn=SRA, a=0X12345678, b= 8, y=0X00123456\n00 00010010001101000101011001111000 10000 LHLHLHHLLHHHHLLLLLLLLLLLLLLLLLLL // 79: fn=SHL, a=0X12345678, b=16, y=0X56780000\n01 00010010001101000101011001111000 10000 LLLLLLLLLLLLLLLLLLLHLLHLLLHHLHLL // 80: fn=SHR, a=0X12345678, b=16, y=0X00001234\n11 00010010001101000101011001111000 10000 LLLLLLLLLLLLLLLLLLLHLLHLLLHHLHLL // 81: fn=SRA, a=0X12345678, b=16, y=0X00001234\n00 00010010001101000101011001111000 11111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 82: fn=SHL, a=0X12345678, b=31, y=0X00000000\n01 00010010001101000101011001111000 11111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 83: fn=SHR, a=0X12345678, b=31, y=0X00000000\n11 00010010001101000101011001111000 11111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 84: fn=SRA, a=0X12345678, b=31, y=0X00000000\n00 11111110110111001011101010011000 00000 HHHHHHHLHHLHHHLLHLHHHLHLHLLHHLLL // 85: fn=SHL, a=0XFEDCBA98, b= 0, y=0XFEDCBA98\n01 11111110110111001011101010011000 00000 HHHHHHHLHHLHHHLLHLHHHLHLHLLHHLLL // 86: fn=SHR, a=0XFEDCBA98, b= 0, y=0XFEDCBA98\n11 11111110110111001011101010011000 00000 HHHHHHHLHHLHHHLLHLHHHLHLHLLHHLLL // 87: fn=SRA, a=0XFEDCBA98, b= 0, y=0XFEDCBA98\n00 11111110110111001011101010011000 00001 HHHHHHLHHLHHHLLHLHHHLHLHLLHHLLLL // 88: fn=SHL, a=0XFEDCBA98, b= 1, y=0XFDB97530\n01 11111110110111001011101010011000 00001 LHHHHHHHLHHLHHHLLHLHHHLHLHLLHHLL // 89: fn=SHR, a=0XFEDCBA98, b= 1, y=0X7F6E5D4C\n11 11111110110111001011101010011000 00001 HHHHHHHHLHHLHHHLLHLHHHLHLHLLHHLL // 90: fn=SRA, a=0XFEDCBA98, b= 1, y=0XFF6E5D4C\n00 11111110110111001011101010011000 00010 HHHHHLHHLHHHLLHLHHHLHLHLLHHLLLLL // 91: fn=SHL, a=0XFEDCBA98, b= 2, y=0XFB72EA60\n01 11111110110111001011101010011000 00010 LLHHHHHHHLHHLHHHLLHLHHHLHLHLLHHL // 92: fn=SHR, a=0XFEDCBA98, b= 2, y=0X3FB72EA6\n11 11111110110111001011101010011000 00010 HHHHHHHHHLHHLHHHLLHLHHHLHLHLLHHL // 93: fn=SRA, a=0XFEDCBA98, b= 2, y=0XFFB72EA6\n00 11111110110111001011101010011000 00100 HHHLHHLHHHLLHLHHHLHLHLLHHLLLLLLL // 94: fn=SHL, a=0XFEDCBA98, b= 4, y=0XEDCBA980\n01 11111110110111001011101010011000 00100 LLLLHHHHHHHLHHLHHHLLHLHHHLHLHLLH // 95: fn=SHR, a=0XFEDCBA98, b= 4, y=0X0FEDCBA9\n11 11111110110111001011101010011000 00100 HHHHHHHHHHHLHHLHHHLLHLHHHLHLHLLH // 96: fn=SRA, a=0XFEDCBA98, b= 4, y=0XFFEDCBA9\n00 11111110110111001011101010011000 01000 HHLHHHLLHLHHHLHLHLLHHLLLLLLLLLLL // 97: fn=SHL, a=0XFEDCBA98, b= 8, y=0XDCBA9800\n01 11111110110111001011101010011000 01000 LLLLLLLLHHHHHHHLHHLHHHLLHLHHHLHL // 98: fn=SHR, a=0XFEDCBA98, b= 8, y=0X00FEDCBA\n11 11111110110111001011101010011000 01000 HHHHHHHHHHHHHHHLHHLHHHLLHLHHHLHL // 99: fn=SRA, a=0XFEDCBA98, b= 8, y=0XFFFEDCBA\n00 11111110110111001011101010011000 10000 HLHHHLHLHLLHHLLLLLLLLLLLLLLLLLLL // 100: fn=SHL, a=0XFEDCBA98, b=16, y=0XBA980000\n01 11111110110111001011101010011000 10000 LLLLLLLLLLLLLLLLHHHHHHHLHHLHHHLL // 101: fn=SHR, a=0XFEDCBA98, b=16, y=0X0000FEDC\n11 11111110110111001011101010011000 10000 HHHHHHHHHHHHHHHHHHHHHHHLHHLHHHLL // 102: fn=SRA, a=0XFEDCBA98, b=16, y=0XFFFFFEDC\n00 11111110110111001011101010011000 11111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 103: fn=SHL, a=0XFEDCBA98, b=31, y=0X00000000\n01 11111110110111001011101010011000 11111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 104: fn=SHR, a=0XFEDCBA98, b=31, y=0X00000001\n11 11111110110111001011101010011000 11111 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH // 105: fn=SRA, a=0XFEDCBA98, b=31, y=0XFFFFFFFF\n\n.plot X(SFN[1:0])\n.plot X(A[31:0])\n.plot X(B[4:0])\n.plot X(Y[31:0])"]]}, "/alu/alu":{"properties":{"readonly":"true","name":{"label":"Name","type":"string","value":"","edit":"yes","choices":[""]}},"schematic":[["/alu/bool",[-32,-40,0],{"name":"bool"}],["/alu/cmp",[-32,88,0],{"name":"cmp"}],["wire",[-64,96,0,-8,0],{"signal":"FN[2:1]"}],["wire",[-64,-16,0,-8,0],{"signal":"FN[3:0]"}],["port",[-128,-88,0],{"signal":"A[31:0]"}],["port",[-128,-24,0],{"signal":"B[31:0]"}],["port",[-128,48,0],{"signal":"FN[5:0]"}],["port",[104,72,4],{"signal":"Y[31:0]","direction":"out"}],["wire",[-64,-72,0,-8,0],{"signal":"FN[1:0]"}],["/alu/arith",[-32,24,0],{"name":"arith"}],["wire",[-64,40,0,-8,0],{"signal":"FN[0]"}],["wire",[-120,24,0,56,0]],["wire",[-64,-80,0,-8,0],{"signal":"B[4:0]"}],["wire",[-64,-88,0,-56,0]],["/gates/mux4",[88,48,0]],["wire",[-120,-32,0,56,0]],["wire",[96,112,0,0,8],{"signal":"FN[5:4]"}],["/alu/shift",[-32,-88,0],{"name":"shift"}],["wire",[-48,64,0,0,8],{"signal":"z"}],["wire",[-32,64,0,0,8],{"signal":"v"}],["wire",[-16,64,0,0,8],{"signal":"n"}],["wire",[-64,-24,0,-64,0]],["wire",[-64,32,0,-64,0]],["wire",[-128,-88,0,8,0]],["wire",[0,-88,0,48,0]],["wire",[0,24,0,8,0]],["wire",[8,24,0,0,56]],["wire",[0,-32,0,32,0]],["wire",[-120,-32,0,0,56]],["wire",[-120,-88,0,0,56]],["wire",[-128,-24,0,0,56]],["wire",[48,-88,0,0,136]],["wire",[32,-32,0,0,96]],["wire",[48,48,0,40,0],{"signal":"shift[31:0]"}],["wire",[32,64,0,56,0],{"signal":"bool[31:0]"}],["wire",[8,80,0,80,0],{"signal":"arith[31:0]"}],["wire",[0,96,0,88,0],{"signal":"cmp[31:0]"}]],"icon":[["text",[-8,-8,0],{"text":"ALU","font":"bold 6pt sans-serif","align":"center"}],["terminal",[-32,-16,0],{"name":"B[31:0]"}],["terminal",[-32,16,0],{"name":"A[31:0]"}],["terminal",[-8,40,3],{"name":"FN[5:0]"}],["terminal",[16,0,4],{"name":"Y[31:0]"}],["text",[-23,16,0],{"text":"A[31:0]","font":"4pt sans-serif"}],["text",[-23,-16,0],{"text":"B[31:0]","font":"4pt sans-serif"}],["text",[7,0,0],{"text":"Y[31:0]","font":"4pt sans-serif","align":"center-right"}],["text",[-8,25,0],{"text":"FN[5:0]","font":"4pt sans-serif","align":"bottom-center"}],["line",[-24,-3,0,4,3]],["line",[-20,0,0,-4,3]],["line",[-24,32,0,32,-12]],["line",[8,-21,0,-32,-11]],["line",[-24,-32,0,0,29]],["line",[-24,3,0,0,29]],["line",[8,-21,0,0,41]],["property",[-8,-27,0],{"format":"{name}","align":"bottom-left"}],["line",[-8,32,0,0,-6]]],"test":[["test",".power Vdd=1\n.thresholds Vol=0 Vil=0.1 Vih=0.9 Voh=1\n\n.group inputs FN[5:0] A[31:0] B[31:0]\n.group outputs Y[31:0] Z V N\n\n.mode gate\n\n.cycle assert inputs tran 99n sample outputs tran 1n\n\n100000 11111111000000001111111100000000 11111111111111110000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 1: fn=F0000, a=0xff00ff00, b=0xffff0000, y=0x00000000\n100001 11111111000000001111111100000000 11111111111111110000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLHHHHHHHH LLH // 2: fn=F0001, a=0xff00ff00, b=0xffff0000, y=0x000000ff\n100010 11111111000000001111111100000000 11111111111111110000000000000000 LLLLLLLLLLLLLLLLHHHHHHHHLLLLLLLL LLH // 3: fn=F0010, a=0xff00ff00, b=0xffff0000, y=0x0000ff00\n100011 11111111000000001111111100000000 11111111111111110000000000000000 LLLLLLLLLLLLLLLLHHHHHHHHHHHHHHHH LLH // 4: fn=F0011, a=0xff00ff00, b=0xffff0000, y=0x0000ffff\n100100 11111111000000001111111100000000 11111111111111110000000000000000 LLLLLLLLHHHHHHHHLLLLLLLLLLLLLLLL LLH // 5: fn=F0100, a=0xff00ff00, b=0xffff0000, y=0x00ff0000\n100101 11111111000000001111111100000000 11111111111111110000000000000000 LLLLLLLLHHHHHHHHLLLLLLLLHHHHHHHH LLH // 6: fn=F0101, a=0xff00ff00, b=0xffff0000, y=0x00ff00ff\n100110 11111111000000001111111100000000 11111111111111110000000000000000 LLLLLLLLHHHHHHHHHHHHHHHHLLLLLLLL LLH // 7: fn= XOR, a=0xff00ff00, b=0xffff0000, y=0x00ffff00\n100111 11111111000000001111111100000000 11111111111111110000000000000000 LLLLLLLLHHHHHHHHHHHHHHHHHHHHHHHH LLH // 8: fn=F0111, a=0xff00ff00, b=0xffff0000, y=0x00ffffff\n101000 11111111000000001111111100000000 11111111111111110000000000000000 HHHHHHHHLLLLLLLLLLLLLLLLLLLLLLLL LLH // 9: fn= AND, a=0xff00ff00, b=0xffff0000, y=0xff000000\n101001 11111111000000001111111100000000 11111111111111110000000000000000 HHHHHHHHLLLLLLLLLLLLLLLLHHHHHHHH LLH // 10: fn= XNOR, a=0xff00ff00, b=0xffff0000, y=0xff0000ff\n101010 11111111000000001111111100000000 11111111111111110000000000000000 HHHHHHHHLLLLLLLLHHHHHHHHLLLLLLLL LLH // 11: fn= A, a=0xff00ff00, b=0xffff0000, y=0xff00ff00\n101011 11111111000000001111111100000000 11111111111111110000000000000000 HHHHHHHHLLLLLLLLHHHHHHHHHHHHHHHH LLH // 12: fn=F1011, a=0xff00ff00, b=0xffff0000, y=0xff00ffff\n101100 11111111000000001111111100000000 11111111111111110000000000000000 HHHHHHHHHHHHHHHHLLLLLLLLLLLLLLLL LLH // 13: fn=F1100, a=0xff00ff00, b=0xffff0000, y=0xffff0000\n101101 11111111000000001111111100000000 11111111111111110000000000000000 HHHHHHHHHHHHHHHHLLLLLLLLHHHHHHHH LLH // 14: fn=F1101, a=0xff00ff00, b=0xffff0000, y=0xffff00ff\n101110 11111111000000001111111100000000 11111111111111110000000000000000 HHHHHHHHHHHHHHHHHHHHHHHHLLLLLLLL LLH // 15: fn= OR, a=0xff00ff00, b=0xffff0000, y=0xffffff00\n101111 11111111000000001111111100000000 11111111111111110000000000000000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 16: fn=F1111, a=0xff00ff00, b=0xffff0000, y=0xffffffff\n110000 00000000000000000000000000000000 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 17: fn= SHL, a=0x00000000, b=0x00000000, y=0x00000000\n110001 00000000000000000000000000000000 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 18: fn= SHR, a=0x00000000, b=0x00000000, y=0x00000000\n110011 00000000000000000000000000000000 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 19: fn= SRA, a=0x00000000, b=0x00000000, y=0x00000000\n110000 00000000000000000000000000000000 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 20: fn= SHL, a=0x00000000, b=0x00000001, y=0x00000000\n110001 00000000000000000000000000000000 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 21: fn= SHR, a=0x00000000, b=0x00000001, y=0x00000000\n110011 00000000000000000000000000000000 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 22: fn= SRA, a=0x00000000, b=0x00000001, y=0x00000000\n110000 00000000000000000000000000000000 00000000000000000000000000000010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 23: fn= SHL, a=0x00000000, b=0x00000002, y=0x00000000\n110001 00000000000000000000000000000000 00000000000000000000000000000010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 24: fn= SHR, a=0x00000000, b=0x00000002, y=0x00000000\n110011 00000000000000000000000000000000 00000000000000000000000000000010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 25: fn= SRA, a=0x00000000, b=0x00000002, y=0x00000000\n110000 00000000000000000000000000000000 00000000000000000000000000000100 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 26: fn= SHL, a=0x00000000, b=0x00000004, y=0x00000000\n110001 00000000000000000000000000000000 00000000000000000000000000000100 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 27: fn= SHR, a=0x00000000, b=0x00000004, y=0x00000000\n110011 00000000000000000000000000000000 00000000000000000000000000000100 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 28: fn= SRA, a=0x00000000, b=0x00000004, y=0x00000000\n110000 00000000000000000000000000000000 00000000000000000000000000001000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 29: fn= SHL, a=0x00000000, b=0x00000008, y=0x00000000\n110001 00000000000000000000000000000000 00000000000000000000000000001000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 30: fn= SHR, a=0x00000000, b=0x00000008, y=0x00000000\n110011 00000000000000000000000000000000 00000000000000000000000000001000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 31: fn= SRA, a=0x00000000, b=0x00000008, y=0x00000000\n110000 00000000000000000000000000000000 00000000000000000000000000010000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 32: fn= SHL, a=0x00000000, b=0x00000010, y=0x00000000\n110001 00000000000000000000000000000000 00000000000000000000000000010000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 33: fn= SHR, a=0x00000000, b=0x00000010, y=0x00000000\n110011 00000000000000000000000000000000 00000000000000000000000000010000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 34: fn= SRA, a=0x00000000, b=0x00000010, y=0x00000000\n110000 00000000000000000000000000000000 00000000000000000000000000011111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 35: fn= SHL, a=0x00000000, b=0x0000001f, y=0x00000000\n110001 00000000000000000000000000000000 00000000000000000000000000011111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 36: fn= SHR, a=0x00000000, b=0x0000001f, y=0x00000000\n110011 00000000000000000000000000000000 00000000000000000000000000011111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 37: fn= SRA, a=0x00000000, b=0x0000001f, y=0x00000000\n110000 00000000000000000000000000000001 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLL // 38: fn= SHL, a=0x00000001, b=0x00000000, y=0x00000001\n110001 00000000000000000000000000000001 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLL // 39: fn= SHR, a=0x00000001, b=0x00000000, y=0x00000001\n110011 00000000000000000000000000000001 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLL // 40: fn= SRA, a=0x00000001, b=0x00000000, y=0x00000001\n110000 00000000000000000000000000000001 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHL LLL // 41: fn= SHL, a=0x00000001, b=0x00000001, y=0x00000002\n110001 00000000000000000000000000000001 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 42: fn= SHR, a=0x00000001, b=0x00000001, y=0x00000000\n110011 00000000000000000000000000000001 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 43: fn= SRA, a=0x00000001, b=0x00000001, y=0x00000000\n110000 00000000000000000000000000000001 00000000000000000000000000000010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LLL // 44: fn= SHL, a=0x00000001, b=0x00000002, y=0x00000004\n110001 00000000000000000000000000000001 00000000000000000000000000000010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 45: fn= SHR, a=0x00000001, b=0x00000002, y=0x00000000\n110011 00000000000000000000000000000001 00000000000000000000000000000010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 46: fn= SRA, a=0x00000001, b=0x00000002, y=0x00000000\n110000 00000000000000000000000000000001 00000000000000000000000000000100 LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLL LLL // 47: fn= SHL, a=0x00000001, b=0x00000004, y=0x00000010\n110001 00000000000000000000000000000001 00000000000000000000000000000100 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 48: fn= SHR, a=0x00000001, b=0x00000004, y=0x00000000\n110011 00000000000000000000000000000001 00000000000000000000000000000100 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 49: fn= SRA, a=0x00000001, b=0x00000004, y=0x00000000\n110000 00000000000000000000000000000001 00000000000000000000000000001000 LLLLLLLLLLLLLLLLLLLLLLLHLLLLLLLL LLL // 50: fn= SHL, a=0x00000001, b=0x00000008, y=0x00000100\n110001 00000000000000000000000000000001 00000000000000000000000000001000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 51: fn= SHR, a=0x00000001, b=0x00000008, y=0x00000000\n110011 00000000000000000000000000000001 00000000000000000000000000001000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 52: fn= SRA, a=0x00000001, b=0x00000008, y=0x00000000\n110000 00000000000000000000000000000001 00000000000000000000000000010000 LLLLLLLLLLLLLLLHLLLLLLLLLLLLLLLL LLL // 53: fn= SHL, a=0x00000001, b=0x00000010, y=0x00010000\n110001 00000000000000000000000000000001 00000000000000000000000000010000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 54: fn= SHR, a=0x00000001, b=0x00000010, y=0x00000000\n110011 00000000000000000000000000000001 00000000000000000000000000010000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 55: fn= SRA, a=0x00000001, b=0x00000010, y=0x00000000\n110000 00000000000000000000000000000001 00000000000000000000000000011111 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 56: fn= SHL, a=0x00000001, b=0x0000001f, y=0x80000000\n110001 00000000000000000000000000000001 00000000000000000000000000011111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 57: fn= SHR, a=0x00000001, b=0x0000001f, y=0x00000000\n110011 00000000000000000000000000000001 00000000000000000000000000011111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 58: fn= SRA, a=0x00000001, b=0x0000001f, y=0x00000000\n110000 11111111111111111111111111111111 00000000000000000000000000000000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 59: fn= SHL, a=0xffffffff, b=0x00000000, y=0xffffffff\n110001 11111111111111111111111111111111 00000000000000000000000000000000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 60: fn= SHR, a=0xffffffff, b=0x00000000, y=0xffffffff\n110011 11111111111111111111111111111111 00000000000000000000000000000000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 61: fn= SRA, a=0xffffffff, b=0x00000000, y=0xffffffff\n110000 11111111111111111111111111111111 00000000000000000000000000000001 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHL HLL // 62: fn= SHL, a=0xffffffff, b=0x00000001, y=0xfffffffe\n110001 11111111111111111111111111111111 00000000000000000000000000000001 LHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 63: fn= SHR, a=0xffffffff, b=0x00000001, y=0x7fffffff\n110011 11111111111111111111111111111111 00000000000000000000000000000001 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 64: fn= SRA, a=0xffffffff, b=0x00000001, y=0xffffffff\n110000 11111111111111111111111111111111 00000000000000000000000000000010 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLL LLL // 65: fn= SHL, a=0xffffffff, b=0x00000002, y=0xfffffffc\n110001 11111111111111111111111111111111 00000000000000000000000000000010 LLHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 66: fn= SHR, a=0xffffffff, b=0x00000002, y=0x3fffffff\n110011 11111111111111111111111111111111 00000000000000000000000000000010 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 67: fn= SRA, a=0xffffffff, b=0x00000002, y=0xffffffff\n110000 11111111111111111111111111111111 00000000000000000000000000000100 HHHHHHHHHHHHHHHHHHHHHHHHHHHHLLLL LLL // 68: fn= SHL, a=0xffffffff, b=0x00000004, y=0xfffffff0\n110001 11111111111111111111111111111111 00000000000000000000000000000100 LLLLHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 69: fn= SHR, a=0xffffffff, b=0x00000004, y=0x0fffffff\n110011 11111111111111111111111111111111 00000000000000000000000000000100 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 70: fn= SRA, a=0xffffffff, b=0x00000004, y=0xffffffff\n110000 11111111111111111111111111111111 00000000000000000000000000001000 HHHHHHHHHHHHHHHHHHHHHHHHLLLLLLLL LLL // 71: fn= SHL, a=0xffffffff, b=0x00000008, y=0xffffff00\n110001 11111111111111111111111111111111 00000000000000000000000000001000 LLLLLLLLHHHHHHHHHHHHHHHHHHHHHHHH LLH // 72: fn= SHR, a=0xffffffff, b=0x00000008, y=0x00ffffff\n110011 11111111111111111111111111111111 00000000000000000000000000001000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 73: fn= SRA, a=0xffffffff, b=0x00000008, y=0xffffffff\n110000 11111111111111111111111111111111 00000000000000000000000000010000 HHHHHHHHHHHHHHHHLLLLLLLLLLLLLLLL LLL // 74: fn= SHL, a=0xffffffff, b=0x00000010, y=0xffff0000\n110001 11111111111111111111111111111111 00000000000000000000000000010000 LLLLLLLLLLLLLLLLHHHHHHHHHHHHHHHH LLH // 75: fn= SHR, a=0xffffffff, b=0x00000010, y=0x0000ffff\n110011 11111111111111111111111111111111 00000000000000000000000000010000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 76: fn= SRA, a=0xffffffff, b=0x00000010, y=0xffffffff\n110000 11111111111111111111111111111111 00000000000000000000000000011111 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 77: fn= SHL, a=0xffffffff, b=0x0000001f, y=0x80000000\n110001 11111111111111111111111111111111 00000000000000000000000000011111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLH // 78: fn= SHR, a=0xffffffff, b=0x0000001f, y=0x00000001\n110011 11111111111111111111111111111111 00000000000000000000000000011111 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 79: fn= SRA, a=0xffffffff, b=0x0000001f, y=0xffffffff\n110000 00010010001101000101011001111000 00000000000000000000000000000000 LLLHLLHLLLHHLHLLLHLHLHHLLHHHHLLL LLL // 80: fn= SHL, a=0x12345678, b=0x00000000, y=0x12345678\n110001 00010010001101000101011001111000 00000000000000000000000000000000 LLLHLLHLLLHHLHLLLHLHLHHLLHHHHLLL LLL // 81: fn= SHR, a=0x12345678, b=0x00000000, y=0x12345678\n110011 00010010001101000101011001111000 00000000000000000000000000000000 LLLHLLHLLLHHLHLLLHLHLHHLLHHHHLLL LLL // 82: fn= SRA, a=0x12345678, b=0x00000000, y=0x12345678\n110000 00010010001101000101011001111000 00000000000000000000000000000001 LLHLLHLLLHHLHLLLHLHLHHLLHHHHLLLL LLL // 83: fn= SHL, a=0x12345678, b=0x00000001, y=0x2468acf0\n110001 00010010001101000101011001111000 00000000000000000000000000000001 LLLLHLLHLLLHHLHLLLHLHLHHLLHHHHLL LLL // 84: fn= SHR, a=0x12345678, b=0x00000001, y=0x091a2b3c\n110011 00010010001101000101011001111000 00000000000000000000000000000001 LLLLHLLHLLLHHLHLLLHLHLHHLLHHHHLL LLL // 85: fn= SRA, a=0x12345678, b=0x00000001, y=0x091a2b3c\n110000 00010010001101000101011001111000 00000000000000000000000000000010 LHLLHLLLHHLHLLLHLHLHHLLHHHHLLLLL LLL // 86: fn= SHL, a=0x12345678, b=0x00000002, y=0x48d159e0\n110001 00010010001101000101011001111000 00000000000000000000000000000010 LLLLLHLLHLLLHHLHLLLHLHLHHLLHHHHL LLL // 87: fn= SHR, a=0x12345678, b=0x00000002, y=0x048d159e\n110011 00010010001101000101011001111000 00000000000000000000000000000010 LLLLLHLLHLLLHHLHLLLHLHLHHLLHHHHL LLL // 88: fn= SRA, a=0x12345678, b=0x00000002, y=0x048d159e\n110000 00010010001101000101011001111000 00000000000000000000000000000100 LLHLLLHHLHLLLHLHLHHLLHHHHLLLLLLL LLL // 89: fn= SHL, a=0x12345678, b=0x00000004, y=0x23456780\n110001 00010010001101000101011001111000 00000000000000000000000000000100 LLLLLLLHLLHLLLHHLHLLLHLHLHHLLHHH LLL // 90: fn= SHR, a=0x12345678, b=0x00000004, y=0x01234567\n110011 00010010001101000101011001111000 00000000000000000000000000000100 LLLLLLLHLLHLLLHHLHLLLHLHLHHLLHHH LLL // 91: fn= SRA, a=0x12345678, b=0x00000004, y=0x01234567\n110000 00010010001101000101011001111000 00000000000000000000000000001000 LLHHLHLLLHLHLHHLLHHHHLLLLLLLLLLL LLL // 92: fn= SHL, a=0x12345678, b=0x00000008, y=0x34567800\n110001 00010010001101000101011001111000 00000000000000000000000000001000 LLLLLLLLLLLHLLHLLLHHLHLLLHLHLHHL LLL // 93: fn= SHR, a=0x12345678, b=0x00000008, y=0x00123456\n110011 00010010001101000101011001111000 00000000000000000000000000001000 LLLLLLLLLLLHLLHLLLHHLHLLLHLHLHHL LLL // 94: fn= SRA, a=0x12345678, b=0x00000008, y=0x00123456\n110000 00010010001101000101011001111000 00000000000000000000000000010000 LHLHLHHLLHHHHLLLLLLLLLLLLLLLLLLL LLL // 95: fn= SHL, a=0x12345678, b=0x00000010, y=0x56780000\n110001 00010010001101000101011001111000 00000000000000000000000000010000 LLLLLLLLLLLLLLLLLLLHLLHLLLHHLHLL LLL // 96: fn= SHR, a=0x12345678, b=0x00000010, y=0x00001234\n110011 00010010001101000101011001111000 00000000000000000000000000010000 LLLLLLLLLLLLLLLLLLLHLLHLLLHHLHLL LLL // 97: fn= SRA, a=0x12345678, b=0x00000010, y=0x00001234\n110000 00010010001101000101011001111000 00000000000000000000000000011111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 98: fn= SHL, a=0x12345678, b=0x0000001f, y=0x00000000\n110001 00010010001101000101011001111000 00000000000000000000000000011111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 99: fn= SHR, a=0x12345678, b=0x0000001f, y=0x00000000\n110011 00010010001101000101011001111000 00000000000000000000000000011111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 100: fn= SRA, a=0x12345678, b=0x0000001f, y=0x00000000\n110000 11111110110111001010101110011000 00000000000000000000000000000000 HHHHHHHLHHLHHHLLHLHLHLHHHLLHHLLL LLH // 101: fn= SHL, a=0xfedcab98, b=0x00000000, y=0xfedcab98\n110001 11111110110111001010101110011000 00000000000000000000000000000000 HHHHHHHLHHLHHHLLHLHLHLHHHLLHHLLL LLH // 102: fn= SHR, a=0xfedcab98, b=0x00000000, y=0xfedcab98\n110011 11111110110111001010101110011000 00000000000000000000000000000000 HHHHHHHLHHLHHHLLHLHLHLHHHLLHHLLL LLH // 103: fn= SRA, a=0xfedcab98, b=0x00000000, y=0xfedcab98\n110000 11111110110111001010101110011000 00000000000000000000000000000001 HHHHHHLHHLHHHLLHLHLHLHHHLLHHLLLL LLH // 104: fn= SHL, a=0xfedcab98, b=0x00000001, y=0xfdb95730\n110001 11111110110111001010101110011000 00000000000000000000000000000001 LHHHHHHHLHHLHHHLLHLHLHLHHHLLHHLL LLH // 105: fn= SHR, a=0xfedcab98, b=0x00000001, y=0x7f6e55cc\n110011 11111110110111001010101110011000 00000000000000000000000000000001 HHHHHHHHLHHLHHHLLHLHLHLHHHLLHHLL LLH // 106: fn= SRA, a=0xfedcab98, b=0x00000001, y=0xff6e55cc\n110000 11111110110111001010101110011000 00000000000000000000000000000010 HHHHHLHHLHHHLLHLHLHLHHHLLHHLLLLL LLH // 107: fn= SHL, a=0xfedcab98, b=0x00000002, y=0xfb72ae60\n110001 11111110110111001010101110011000 00000000000000000000000000000010 LLHHHHHHHLHHLHHHLLHLHLHLHHHLLHHL LLH // 108: fn= SHR, a=0xfedcab98, b=0x00000002, y=0x3fb72ae6\n110011 11111110110111001010101110011000 00000000000000000000000000000010 HHHHHHHHHLHHLHHHLLHLHLHLHHHLLHHL LLH // 109: fn= SRA, a=0xfedcab98, b=0x00000002, y=0xffb72ae6\n110000 11111110110111001010101110011000 00000000000000000000000000000100 HHHLHHLHHHLLHLHLHLHHHLLHHLLLLLLL LLH // 110: fn= SHL, a=0xfedcab98, b=0x00000004, y=0xedcab980\n110001 11111110110111001010101110011000 00000000000000000000000000000100 LLLLHHHHHHHLHHLHHHLLHLHLHLHHHLLH LLH // 111: fn= SHR, a=0xfedcab98, b=0x00000004, y=0x0fedcab9\n110011 11111110110111001010101110011000 00000000000000000000000000000100 HHHHHHHHHHHLHHLHHHLLHLHLHLHHHLLH LLH // 112: fn= SRA, a=0xfedcab98, b=0x00000004, y=0xffedcab9\n110000 11111110110111001010101110011000 00000000000000000000000000001000 HHLHHHLLHLHLHLHHHLLHHLLLLLLLLLLL LLH // 113: fn= SHL, a=0xfedcab98, b=0x00000008, y=0xdcab9800\n110001 11111110110111001010101110011000 00000000000000000000000000001000 LLLLLLLLHHHHHHHLHHLHHHLLHLHLHLHH LLH // 114: fn= SHR, a=0xfedcab98, b=0x00000008, y=0x00fedcab\n110011 11111110110111001010101110011000 00000000000000000000000000001000 HHHHHHHHHHHHHHHLHHLHHHLLHLHLHLHH LLH // 115: fn= SRA, a=0xfedcab98, b=0x00000008, y=0xfffedcab\n110000 11111110110111001010101110011000 00000000000000000000000000010000 HLHLHLHHHLLHHLLLLLLLLLLLLLLLLLLL LLH // 116: fn= SHL, a=0xfedcab98, b=0x00000010, y=0xab980000\n110001 11111110110111001010101110011000 00000000000000000000000000010000 LLLLLLLLLLLLLLLLHHHHHHHLHHLHHHLL LLH // 117: fn= SHR, a=0xfedcab98, b=0x00000010, y=0x0000fedc\n110011 11111110110111001010101110011000 00000000000000000000000000010000 HHHHHHHHHHHHHHHHHHHHHHHLHHLHHHLL LLH // 118: fn= SRA, a=0xfedcab98, b=0x00000010, y=0xfffffedc\n110000 11111110110111001010101110011000 00000000000000000000000000011111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 119: fn= SHL, a=0xfedcab98, b=0x0000001f, y=0x00000000\n110001 11111110110111001010101110011000 00000000000000000000000000011111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLH // 120: fn= SHR, a=0xfedcab98, b=0x0000001f, y=0x00000001\n110011 11111110110111001010101110011000 00000000000000000000000000011111 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 121: fn= SRA, a=0xfedcab98, b=0x0000001f, y=0xffffffff\n010000 00000000000000000000000000000000 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 122: fn= ADD, a=0x00000000, b=0x00000000, y=0x00000000\n010000 00000000000000000000000000000000 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLL // 123: fn= ADD, a=0x00000000, b=0x00000001, y=0x00000001\n010000 00000000000000000000000000000000 11111111111111111111111111111111 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 124: fn= ADD, a=0x00000000, b=0x-0000001, y=0xffffffff\n010000 00000000000000000000000000000000 10101010101010101010101010101010 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL LLH // 125: fn= ADD, a=0x00000000, b=0xaaaaaaaa, y=0xaaaaaaaa\n010000 00000000000000000000000000000000 01010101010101010101010101010101 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH LLL // 126: fn= ADD, a=0x00000000, b=0x55555555, y=0x55555555\n010000 00000000000000000000000000000001 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLL // 127: fn= ADD, a=0x00000001, b=0x00000000, y=0x00000001\n010000 00000000000000000000000000000001 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHL LLL // 128: fn= ADD, a=0x00000001, b=0x00000001, y=0x00000002\n010000 00000000000000000000000000000001 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 129: fn= ADD, a=0x00000001, b=0x-0000001, y=0x00000000\n010000 00000000000000000000000000000001 10101010101010101010101010101010 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHH LLH // 130: fn= ADD, a=0x00000001, b=0xaaaaaaaa, y=0xaaaaaaab\n010000 00000000000000000000000000000001 01010101010101010101010101010101 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHHL LLL // 131: fn= ADD, a=0x00000001, b=0x55555555, y=0x55555556\n010000 11111111111111111111111111111111 00000000000000000000000000000000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 132: fn= ADD, a=0x-0000001, b=0x00000000, y=0xffffffff\n010000 11111111111111111111111111111111 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 133: fn= ADD, a=0x-0000001, b=0x00000001, y=0x00000000\n010000 11111111111111111111111111111111 11111111111111111111111111111111 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHL LLH // 134: fn= ADD, a=0x-0000001, b=0x-0000001, y=0xfffffffe\n010000 11111111111111111111111111111111 10101010101010101010101010101010 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLLH LLH // 135: fn= ADD, a=0x-0000001, b=0xaaaaaaaa, y=0xaaaaaaa9\n010000 11111111111111111111111111111111 01010101010101010101010101010101 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLL LLL // 136: fn= ADD, a=0x-0000001, b=0x55555555, y=0x55555554\n010000 10101010101010101010101010101010 00000000000000000000000000000000 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL LLH // 137: fn= ADD, a=0xaaaaaaaa, b=0x00000000, y=0xaaaaaaaa\n010000 10101010101010101010101010101010 00000000000000000000000000000001 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHH LLH // 138: fn= ADD, a=0xaaaaaaaa, b=0x00000001, y=0xaaaaaaab\n010000 10101010101010101010101010101010 11111111111111111111111111111111 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLLH LLH // 139: fn= ADD, a=0xaaaaaaaa, b=0x-0000001, y=0xaaaaaaa9\n010000 10101010101010101010101010101010 10101010101010101010101010101010 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLL LHL // 140: fn= ADD, a=0xaaaaaaaa, b=0xaaaaaaaa, y=0x55555554\n010000 10101010101010101010101010101010 01010101010101010101010101010101 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 141: fn= ADD, a=0xaaaaaaaa, b=0x55555555, y=0xffffffff\n010000 01010101010101010101010101010101 00000000000000000000000000000000 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH LLL // 142: fn= ADD, a=0x55555555, b=0x00000000, y=0x55555555\n010000 01010101010101010101010101010101 00000000000000000000000000000001 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHHL LLL // 143: fn= ADD, a=0x55555555, b=0x00000001, y=0x55555556\n010000 01010101010101010101010101010101 11111111111111111111111111111111 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLL LLL // 144: fn= ADD, a=0x55555555, b=0x-0000001, y=0x55555554\n010000 01010101010101010101010101010101 10101010101010101010101010101010 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 145: fn= ADD, a=0x55555555, b=0xaaaaaaaa, y=0xffffffff\n010000 01010101010101010101010101010101 01010101010101010101010101010101 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL LHH // 146: fn= ADD, a=0x55555555, b=0x55555555, y=0xaaaaaaaa\n010001 00000000000000000000000000000000 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 147: fn= SUB, a=0x00000000, b=0x00000000, y=0x00000000\n010001 00000000000000000000000000000000 00000000000000000000000000000001 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 148: fn= SUB, a=0x00000000, b=0x00000001, y=0xffffffff\n010001 00000000000000000000000000000000 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLL // 149: fn= SUB, a=0x00000000, b=0x-0000001, y=0x00000001\n010001 00000000000000000000000000000000 10101010101010101010101010101010 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHHL LLL // 150: fn= SUB, a=0x00000000, b=0xaaaaaaaa, y=0x55555556\n010001 00000000000000000000000000000000 01010101010101010101010101010101 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHH LLH // 151: fn= SUB, a=0x00000000, b=0x55555555, y=0xaaaaaaab\n010001 00000000000000000000000000000001 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLL // 152: fn= SUB, a=0x00000001, b=0x00000000, y=0x00000001\n010001 00000000000000000000000000000001 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 153: fn= SUB, a=0x00000001, b=0x00000001, y=0x00000000\n010001 00000000000000000000000000000001 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHL LLL // 154: fn= SUB, a=0x00000001, b=0x-0000001, y=0x00000002\n010001 00000000000000000000000000000001 10101010101010101010101010101010 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHHH LLL // 155: fn= SUB, a=0x00000001, b=0xaaaaaaaa, y=0x55555557\n010001 00000000000000000000000000000001 01010101010101010101010101010101 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHHLL LLH // 156: fn= SUB, a=0x00000001, b=0x55555555, y=0xaaaaaaac\n010001 11111111111111111111111111111111 00000000000000000000000000000000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH LLH // 157: fn= SUB, a=0x-0000001, b=0x00000000, y=0xffffffff\n010001 11111111111111111111111111111111 00000000000000000000000000000001 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHL LLH // 158: fn= SUB, a=0x-0000001, b=0x00000001, y=0xfffffffe\n010001 11111111111111111111111111111111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 159: fn= SUB, a=0x-0000001, b=0x-0000001, y=0x00000000\n010001 11111111111111111111111111111111 10101010101010101010101010101010 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH LLL // 160: fn= SUB, a=0x-0000001, b=0xaaaaaaaa, y=0x55555555\n010001 11111111111111111111111111111111 01010101010101010101010101010101 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL LLH // 161: fn= SUB, a=0x-0000001, b=0x55555555, y=0xaaaaaaaa\n010001 10101010101010101010101010101010 00000000000000000000000000000000 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL LLH // 162: fn= SUB, a=0xaaaaaaaa, b=0x00000000, y=0xaaaaaaaa\n010001 10101010101010101010101010101010 00000000000000000000000000000001 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLLH LLH // 163: fn= SUB, a=0xaaaaaaaa, b=0x00000001, y=0xaaaaaaa9\n010001 10101010101010101010101010101010 11111111111111111111111111111111 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHH LLH // 164: fn= SUB, a=0xaaaaaaaa, b=0x-0000001, y=0xaaaaaaab\n010001 10101010101010101010101010101010 10101010101010101010101010101010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 165: fn= SUB, a=0xaaaaaaaa, b=0xaaaaaaaa, y=0x00000000\n010001 10101010101010101010101010101010 01010101010101010101010101010101 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH LHL // 166: fn= SUB, a=0xaaaaaaaa, b=0x55555555, y=0x55555555\n010001 01010101010101010101010101010101 00000000000000000000000000000000 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH LLL // 167: fn= SUB, a=0x55555555, b=0x00000000, y=0x55555555\n010001 01010101010101010101010101010101 00000000000000000000000000000001 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLL LLL // 168: fn= SUB, a=0x55555555, b=0x00000001, y=0x55555554\n010001 01010101010101010101010101010101 11111111111111111111111111111111 LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHHL LLL // 169: fn= SUB, a=0x55555555, b=0x-0000001, y=0x55555556\n010001 01010101010101010101010101010101 10101010101010101010101010101010 HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHH LHH // 170: fn= SUB, a=0x55555555, b=0xaaaaaaaa, y=0xaaaaaaab\n010001 01010101010101010101010101010101 01010101010101010101010101010101 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 171: fn= SUB, a=0x55555555, b=0x55555555, y=0x00000000\n000011 00000000000000000000000000000101 11011110101011011011111011101111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 172: fn=CMPEQ, a=0x00000005, b=0xdeadbeef, y=0x00000000\n000101 00000000000000000000000000000101 11011110101011011011111011101111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 173: fn=CMPLT, a=0x00000005, b=0xdeadbeef, y=0x00000000\n000111 00000000000000000000000000000101 11011110101011011011111011101111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLL // 174: fn=CMPLE, a=0x00000005, b=0xdeadbeef, y=0x00000000\n000011 00010010001101000101011001111000 00010010001101000101011001111000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH HLL // 175: fn=CMPEQ, a=0x12345678, b=0x12345678, y=0x00000001\n000101 00010010001101000101011001111000 00010010001101000101011001111000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLL // 176: fn=CMPLT, a=0x12345678, b=0x12345678, y=0x00000000\n000111 00010010001101000101011001111000 00010010001101000101011001111000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH HLL // 177: fn=CMPLE, a=0x12345678, b=0x12345678, y=0x00000001\n000011 10000000000000000000000000000000 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LHL // 178: fn=CMPEQ, a=0x80000000, b=0x00000001, y=0x00000000\n000101 10000000000000000000000000000000 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LHL // 179: fn=CMPLT, a=0x80000000, b=0x00000001, y=0x00000001\n000111 10000000000000000000000000000000 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LHL // 180: fn=CMPLE, a=0x80000000, b=0x00000001, y=0x00000001\n000011 11011110101011011011111011101111 00000000000000000000000000000101 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLH // 181: fn=CMPEQ, a=0xdeadbeef, b=0x00000005, y=0x00000000\n000101 11011110101011011011111011101111 00000000000000000000000000000101 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLH // 182: fn=CMPLT, a=0xdeadbeef, b=0x00000005, y=0x00000001\n000111 11011110101011011011111011101111 00000000000000000000000000000101 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLH // 183: fn=CMPLE, a=0xdeadbeef, b=0x00000005, y=0x00000001\n000011 01111111111111111111111111111111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LHH // 184: fn=CMPEQ, a=0x7fffffff, b=0xffffffff, y=0x00000000\n000101 01111111111111111111111111111111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LHH // 185: fn=CMPLT, a=0x7fffffff, b=0xffffffff, y=0x00000000\n000111 01111111111111111111111111111111 11111111111111111111111111111111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LHH // 186: fn=CMPLE, a=0x7fffffff, b=0xffffffff, y=0x00000000\n\n// map FN[5:0] to text for operation\n.plotdef op ? ? ? CMPEQ ? CMPLT ? CMPLE ? ? ? ? ? ? ? ? ADD SUB ? ? ? ? ? ? ? ? ? ? ? ? ? ? F0000 F0001 F0010 F0011 F0100 F0101 XOR F0111 AND XNOR A F1011 F1100 F1101 OR F1111 SHL SHR ? SRA ? ? ? ? ? ? ? ? ? ? ? ?\n\n.plot op(FN[5:0])\n.plot X(A[31:0])\n.plot X(B[31:0])\n.plot X(Y[31:0])\n.plot Z\n.plot V\n.plot N"]]}, "/beta/beta":{"properties":{"name":{"edit":"yes","type":"name","value":"","label":"Name"}},"schematic":[["port",[-288,-176,0],{"signal":"clk"}],["port",[-288,-192,0],{"signal":"reset"}],["port",[-288,-208,0],{"signal":"irq"}],["port",[-288,-240,0],{"signal":"id[31:0]"}],["port",[-288,-224,0],{"signal":"mrd[31:0]"}],["port",[-192,-240,4],{"signal":"ia[31:0]","direction":"out"}],["port",[-192,-224,4],{"signal":"ma[31:0]","direction":"out"}],["port",[-192,-208,4],{"signal":"mwr","direction":"out"}],["port",[-192,-192,4],{"signal":"moe","direction":"out"}],["port",[-192,-176,4],{"signal":"mwd[31:0]","direction":"out"}]],"test":[["test",""]],"icon":[["terminal",[-32,16,0],{"name":"clk"}],["terminal",[-32,0,0],{"name":"reset"}],["terminal",[-32,-16,0],{"name":"irq"}],["terminal",[-32,-32,0],{"name":"mrd[31:0]"}],["terminal",[-32,-48,0],{"name":"id[31:0]"}],["text",[-23,-48,0],{"text":"ID[31:0]","font":"4pt sans-serif"}],["text",[-23,-32,0],{"text":"MRD[31:0]","font":"4pt sans-serif"}],["text",[-23,-16,0],{"text":"IRQ","font":"4pt sans-serif"}],["text",[-23,0,0],{"text":"RESET","font":"4pt sans-serif"}],["line",[-16,16,0,-8,4]],["line",[-16,16,0,-8,-4]],["terminal",[64,-48,4],{"name":"ia[31:0]"}],["text",[55,-48,4],{"text":"IA[31:0]","font":"4pt sans-serif"}],["terminal",[64,-32,4],{"name":"ma[31:0]"}],["text",[55,-32,4],{"text":"MA[31:0]","font":"4pt sans-serif"}],["terminal",[64,-16,4],{"name":"moe"}],["text",[55,-16,4],{"text":"MOE","font":"4pt sans-serif"}],["terminal",[64,0,4],{"name":"mwr"}],["text",[55,0,4],{"text":"MWR","font":"4pt sans-serif"}],["terminal",[64,16,4],{"name":"mwd[31:0]"}],["text",[55,16,4],{"text":"MWD[31:0]","font":"4pt sans-serif"}],["text",[16,-59,0],{"text":"BETA","font":"bold 6pt sans-serif","align":"center"}],["line",[-24,-64,0,0,88]],["line",[-24,24,0,80,0]],["line",[56,24,0,0,-88]],["line",[56,-64,0,-80,0]],["property",[16,-66,0],{"format":"{name}","align":"bottom-center"}]]}, "/beta/ctl":{"properties":{"name":{"edit":"yes","type":"name","value":"","label":"Name"},"test-readonly":{"label":"test-readonly","type":"string","value":"true","edit":"yes","choices":[""]}},"icon":[["terminal",[-56,-8,0],{"name":"reset"}],["terminal",[-56,8,0],{"name":"irq"}],["terminal",[-56,24,0],{"name":"z"}],["terminal",[-56,-24,0],{"name":"op[5:0]"}],["terminal",[24,72,2],{"name":"ra2sel"}],["terminal",[24,-8,2],{"name":"asel"}],["terminal",[24,8,2],{"name":"bsel"}],["terminal",[24,-24,2],{"name":"alufn[5:0]"}],["terminal",[24,104,2],{"name":"wdsel[1:0]"}],["terminal",[24,88,2],{"name":"wasel"}],["terminal",[24,120,2],{"name":"werf"}],["terminal",[24,56,2],{"name":"pcsel[2:0]"}],["terminal",[24,24,2],{"name":"moe"}],["terminal",[24,40,2],{"name":"mwr"}],["text",[-47,-24,0],{"text":"OP[5:0]","font":"4pt sans-serif"}],["text",[-47,-8,0],{"text":"RESET","font":"4pt sans-serif"}],["text",[-47,8,0],{"text":"IRQ","font":"4pt sans-serif"}],["text",[-47,24,0],{"text":"Z","font":"4pt sans-serif"}],["text",[15,72,0],{"text":"RA2SEL","font":"4pt sans-serif","align":"center-right"}],["text",[15,-8,0],{"text":"ASEL","font":"4pt sans-serif","align":"center-right"}],["text",[15,8,0],{"text":"BSEL","font":"4pt sans-serif","align":"center-right"}],["text",[15,-24,0],{"text":"ALUFN[5:0]","font":"4pt sans-serif","align":"center-right"}],["text",[15,104,0],{"text":"WDSEL[1:0]","font":"4pt sans-serif","align":"center-right"}],["text",[15,88,0],{"text":"WASEL","font":"4pt sans-serif","align":"center-right"}],["text",[15,120,0],{"text":"WERF","font":"4pt sans-serif","align":"center-right"}],["text",[15,56,0],{"text":"PCSEL[2:0]","font":"4pt sans-serif","align":"center-right"}],["text",[15,24,0],{"text":"MOE","font":"4pt sans-serif","align":"center-right"}],["text",[15,40,0],{"text":"MWR","font":"4pt sans-serif","align":"center-right"}],["text",[-16,-35,0],{"text":"CTL","font":"bold 6pt sans-serif","align":"center"}],["line",[-48,-40,0,0,168]],["line",[-48,128,0,64,0]],["line",[16,128,0,0,-168]],["line",[16,-40,0,-64,0]],["property",[-16,-42,0],{"format":"{name}","align":"bottom-center"}]],"test":[["test",".power Vdd=1\n.thresholds Vol=0 Vil=0.1 Vih=0.9 Voh=1\n\n.group inputs OP[5:0] RESET IRQ Z\n.group outputs ALUFN[5:0] ASEL BSEL MOE MWR PCSEL[2:0] RA2SEL WASEL WDSEL[1:0] WERF\n\n.mode gate\n\n.cycle assert inputs tran 99n sample outputs tran 1n\n\n000000 000 ------ -- -L LHH - HLLH // 1: op=0b000000 ???\n000000 001 ------ -- -L LHH - HLLH // 2: op=0b000000 ???\n000000 010 ------ -- -L HLL - HLLH // 3: op=0b000000 ???\n000000 011 ------ -- -L HLL - HLLH // 4: op=0b000000 ???\n000000 100 ------ -- -L --- - ---- // 5: op=0b000000 ???\n000000 101 ------ -- -L --- - ---- // 6: op=0b000000 ???\n000000 110 ------ -- -L --- - ---- // 7: op=0b000000 ???\n000000 111 ------ -- -L --- - ---- // 8: op=0b000000 ???\n000001 000 ------ -- -L LHH - HLLH // 9: op=0b000001 ???\n000001 001 ------ -- -L LHH - HLLH // 10: op=0b000001 ???\n000001 010 ------ -- -L HLL - HLLH // 11: op=0b000001 ???\n000001 011 ------ -- -L HLL - HLLH // 12: op=0b000001 ???\n000001 100 ------ -- -L --- - ---- // 13: op=0b000001 ???\n000001 101 ------ -- -L --- - ---- // 14: op=0b000001 ???\n000001 110 ------ -- -L --- - ---- // 15: op=0b000001 ???\n000001 111 ------ -- -L --- - ---- // 16: op=0b000001 ???\n000010 000 ------ -- -L LHH - HLLH // 17: op=0b000010 ???\n000010 001 ------ -- -L LHH - HLLH // 18: op=0b000010 ???\n000010 010 ------ -- -L HLL - HLLH // 19: op=0b000010 ???\n000010 011 ------ -- -L HLL - HLLH // 20: op=0b000010 ???\n000010 100 ------ -- -L --- - ---- // 21: op=0b000010 ???\n000010 101 ------ -- -L --- - ---- // 22: op=0b000010 ???\n000010 110 ------ -- -L --- - ---- // 23: op=0b000010 ???\n000010 111 ------ -- -L --- - ---- // 24: op=0b000010 ???\n000011 000 ------ -- -L LHH - HLLH // 25: op=0b000011 ???\n000011 001 ------ -- -L LHH - HLLH // 26: op=0b000011 ???\n000011 010 ------ -- -L HLL - HLLH // 27: op=0b000011 ???\n000011 011 ------ -- -L HLL - HLLH // 28: op=0b000011 ???\n000011 100 ------ -- -L --- - ---- // 29: op=0b000011 ???\n000011 101 ------ -- -L --- - ---- // 30: op=0b000011 ???\n000011 110 ------ -- -L --- - ---- // 31: op=0b000011 ???\n000011 111 ------ -- -L --- - ---- // 32: op=0b000011 ???\n000100 000 ------ -- -L LHH - HLLH // 33: op=0b000100 ???\n000100 001 ------ -- -L LHH - HLLH // 34: op=0b000100 ???\n000100 010 ------ -- -L HLL - HLLH // 35: op=0b000100 ???\n000100 011 ------ -- -L HLL - HLLH // 36: op=0b000100 ???\n000100 100 ------ -- -L --- - ---- // 37: op=0b000100 ???\n000100 101 ------ -- -L --- - ---- // 38: op=0b000100 ???\n000100 110 ------ -- -L --- - ---- // 39: op=0b000100 ???\n000100 111 ------ -- -L --- - ---- // 40: op=0b000100 ???\n000101 000 ------ -- -L LHH - HLLH // 41: op=0b000101 ???\n000101 001 ------ -- -L LHH - HLLH // 42: op=0b000101 ???\n000101 010 ------ -- -L HLL - HLLH // 43: op=0b000101 ???\n000101 011 ------ -- -L HLL - HLLH // 44: op=0b000101 ???\n000101 100 ------ -- -L --- - ---- // 45: op=0b000101 ???\n000101 101 ------ -- -L --- - ---- // 46: op=0b000101 ???\n000101 110 ------ -- -L --- - ---- // 47: op=0b000101 ???\n000101 111 ------ -- -L --- - ---- // 48: op=0b000101 ???\n000110 000 ------ -- -L LHH - HLLH // 49: op=0b000110 ???\n000110 001 ------ -- -L LHH - HLLH // 50: op=0b000110 ???\n000110 010 ------ -- -L HLL - HLLH // 51: op=0b000110 ???\n000110 011 ------ -- -L HLL - HLLH // 52: op=0b000110 ???\n000110 100 ------ -- -L --- - ---- // 53: op=0b000110 ???\n000110 101 ------ -- -L --- - ---- // 54: op=0b000110 ???\n000110 110 ------ -- -L --- - ---- // 55: op=0b000110 ???\n000110 111 ------ -- -L --- - ---- // 56: op=0b000110 ???\n000111 000 ------ -- -L LHH - HLLH // 57: op=0b000111 ???\n000111 001 ------ -- -L LHH - HLLH // 58: op=0b000111 ???\n000111 010 ------ -- -L HLL - HLLH // 59: op=0b000111 ???\n000111 011 ------ -- -L HLL - HLLH // 60: op=0b000111 ???\n000111 100 ------ -- -L --- - ---- // 61: op=0b000111 ???\n000111 101 ------ -- -L --- - ---- // 62: op=0b000111 ???\n000111 110 ------ -- -L --- - ---- // 63: op=0b000111 ???\n000111 111 ------ -- -L --- - ---- // 64: op=0b000111 ???\n001000 000 ------ -- -L LHH - HLLH // 65: op=0b001000 ???\n001000 001 ------ -- -L LHH - HLLH // 66: op=0b001000 ???\n001000 010 ------ -- -L HLL - HLLH // 67: op=0b001000 ???\n001000 011 ------ -- -L HLL - HLLH // 68: op=0b001000 ???\n001000 100 ------ -- -L --- - ---- // 69: op=0b001000 ???\n001000 101 ------ -- -L --- - ---- // 70: op=0b001000 ???\n001000 110 ------ -- -L --- - ---- // 71: op=0b001000 ???\n001000 111 ------ -- -L --- - ---- // 72: op=0b001000 ???\n001001 000 ------ -- -L LHH - HLLH // 73: op=0b001001 ???\n001001 001 ------ -- -L LHH - HLLH // 74: op=0b001001 ???\n001001 010 ------ -- -L HLL - HLLH // 75: op=0b001001 ???\n001001 011 ------ -- -L HLL - HLLH // 76: op=0b001001 ???\n001001 100 ------ -- -L --- - ---- // 77: op=0b001001 ???\n001001 101 ------ -- -L --- - ---- // 78: op=0b001001 ???\n001001 110 ------ -- -L --- - ---- // 79: op=0b001001 ???\n001001 111 ------ -- -L --- - ---- // 80: op=0b001001 ???\n001010 000 ------ -- -L LHH - HLLH // 81: op=0b001010 ???\n001010 001 ------ -- -L LHH - HLLH // 82: op=0b001010 ???\n001010 010 ------ -- -L HLL - HLLH // 83: op=0b001010 ???\n001010 011 ------ -- -L HLL - HLLH // 84: op=0b001010 ???\n001010 100 ------ -- -L --- - ---- // 85: op=0b001010 ???\n001010 101 ------ -- -L --- - ---- // 86: op=0b001010 ???\n001010 110 ------ -- -L --- - ---- // 87: op=0b001010 ???\n001010 111 ------ -- -L --- - ---- // 88: op=0b001010 ???\n001011 000 ------ -- -L LHH - HLLH // 89: op=0b001011 ???\n001011 001 ------ -- -L LHH - HLLH // 90: op=0b001011 ???\n001011 010 ------ -- -L HLL - HLLH // 91: op=0b001011 ???\n001011 011 ------ -- -L HLL - HLLH // 92: op=0b001011 ???\n001011 100 ------ -- -L --- - ---- // 93: op=0b001011 ???\n001011 101 ------ -- -L --- - ---- // 94: op=0b001011 ???\n001011 110 ------ -- -L --- - ---- // 95: op=0b001011 ???\n001011 111 ------ -- -L --- - ---- // 96: op=0b001011 ???\n001100 000 ------ -- -L LHH - HLLH // 97: op=0b001100 ???\n001100 001 ------ -- -L LHH - HLLH // 98: op=0b001100 ???\n001100 010 ------ -- -L HLL - HLLH // 99: op=0b001100 ???\n001100 011 ------ -- -L HLL - HLLH // 100: op=0b001100 ???\n001100 100 ------ -- -L --- - ---- // 101: op=0b001100 ???\n001100 101 ------ -- -L --- - ---- // 102: op=0b001100 ???\n001100 110 ------ -- -L --- - ---- // 103: op=0b001100 ???\n001100 111 ------ -- -L --- - ---- // 104: op=0b001100 ???\n001101 000 ------ -- -L LHH - HLLH // 105: op=0b001101 ???\n001101 001 ------ -- -L LHH - HLLH // 106: op=0b001101 ???\n001101 010 ------ -- -L HLL - HLLH // 107: op=0b001101 ???\n001101 011 ------ -- -L HLL - HLLH // 108: op=0b001101 ???\n001101 100 ------ -- -L --- - ---- // 109: op=0b001101 ???\n001101 101 ------ -- -L --- - ---- // 110: op=0b001101 ???\n001101 110 ------ -- -L --- - ---- // 111: op=0b001101 ???\n001101 111 ------ -- -L --- - ---- // 112: op=0b001101 ???\n001110 000 ------ -- -L LHH - HLLH // 113: op=0b001110 ???\n001110 001 ------ -- -L LHH - HLLH // 114: op=0b001110 ???\n001110 010 ------ -- -L HLL - HLLH // 115: op=0b001110 ???\n001110 011 ------ -- -L HLL - HLLH // 116: op=0b001110 ???\n001110 100 ------ -- -L --- - ---- // 117: op=0b001110 ???\n001110 101 ------ -- -L --- - ---- // 118: op=0b001110 ???\n001110 110 ------ -- -L --- - ---- // 119: op=0b001110 ???\n001110 111 ------ -- -L --- - ---- // 120: op=0b001110 ???\n001111 000 ------ -- -L LHH - HLLH // 121: op=0b001111 ???\n001111 001 ------ -- -L LHH - HLLH // 122: op=0b001111 ???\n001111 010 ------ -- -L HLL - HLLH // 123: op=0b001111 ???\n001111 011 ------ -- -L HLL - HLLH // 124: op=0b001111 ???\n001111 100 ------ -- -L --- - ---- // 125: op=0b001111 ???\n001111 101 ------ -- -L --- - ---- // 126: op=0b001111 ???\n001111 110 ------ -- -L --- - ---- // 127: op=0b001111 ???\n001111 111 ------ -- -L --- - ---- // 128: op=0b001111 ???\n010000 000 ------ -- -L LHH - HLLH // 129: op=0b010000 ???\n010000 001 ------ -- -L LHH - HLLH // 130: op=0b010000 ???\n010000 010 ------ -- -L HLL - HLLH // 131: op=0b010000 ???\n010000 011 ------ -- -L HLL - HLLH // 132: op=0b010000 ???\n010000 100 ------ -- -L --- - ---- // 133: op=0b010000 ???\n010000 101 ------ -- -L --- - ---- // 134: op=0b010000 ???\n010000 110 ------ -- -L --- - ---- // 135: op=0b010000 ???\n010000 111 ------ -- -L --- - ---- // 136: op=0b010000 ???\n010001 000 ------ -- -L LHH - HLLH // 137: op=0b010001 ???\n010001 001 ------ -- -L LHH - HLLH // 138: op=0b010001 ???\n010001 010 ------ -- -L HLL - HLLH // 139: op=0b010001 ???\n010001 011 ------ -- -L HLL - HLLH // 140: op=0b010001 ???\n010001 100 ------ -- -L --- - ---- // 141: op=0b010001 ???\n010001 101 ------ -- -L --- - ---- // 142: op=0b010001 ???\n010001 110 ------ -- -L --- - ---- // 143: op=0b010001 ???\n010001 111 ------ -- -L --- - ---- // 144: op=0b010001 ???\n010010 000 ------ -- -L LHH - HLLH // 145: op=0b010010 ???\n010010 001 ------ -- -L LHH - HLLH // 146: op=0b010010 ???\n010010 010 ------ -- -L HLL - HLLH // 147: op=0b010010 ???\n010010 011 ------ -- -L HLL - HLLH // 148: op=0b010010 ???\n010010 100 ------ -- -L --- - ---- // 149: op=0b010010 ???\n010010 101 ------ -- -L --- - ---- // 150: op=0b010010 ???\n010010 110 ------ -- -L --- - ---- // 151: op=0b010010 ???\n010010 111 ------ -- -L --- - ---- // 152: op=0b010010 ???\n010011 000 ------ -- -L LHH - HLLH // 153: op=0b010011 ???\n010011 001 ------ -- -L LHH - HLLH // 154: op=0b010011 ???\n010011 010 ------ -- -L HLL - HLLH // 155: op=0b010011 ???\n010011 011 ------ -- -L HLL - HLLH // 156: op=0b010011 ???\n010011 100 ------ -- -L --- - ---- // 157: op=0b010011 ???\n010011 101 ------ -- -L --- - ---- // 158: op=0b010011 ???\n010011 110 ------ -- -L --- - ---- // 159: op=0b010011 ???\n010011 111 ------ -- -L --- - ---- // 160: op=0b010011 ???\n010100 000 ------ -- -L LHH - HLLH // 161: op=0b010100 ???\n010100 001 ------ -- -L LHH - HLLH // 162: op=0b010100 ???\n010100 010 ------ -- -L HLL - HLLH // 163: op=0b010100 ???\n010100 011 ------ -- -L HLL - HLLH // 164: op=0b010100 ???\n010100 100 ------ -- -L --- - ---- // 165: op=0b010100 ???\n010100 101 ------ -- -L --- - ---- // 166: op=0b010100 ???\n010100 110 ------ -- -L --- - ---- // 167: op=0b010100 ???\n010100 111 ------ -- -L --- - ---- // 168: op=0b010100 ???\n010101 000 ------ -- -L LHH - HLLH // 169: op=0b010101 ???\n010101 001 ------ -- -L LHH - HLLH // 170: op=0b010101 ???\n010101 010 ------ -- -L HLL - HLLH // 171: op=0b010101 ???\n010101 011 ------ -- -L HLL - HLLH // 172: op=0b010101 ???\n010101 100 ------ -- -L --- - ---- // 173: op=0b010101 ???\n010101 101 ------ -- -L --- - ---- // 174: op=0b010101 ???\n010101 110 ------ -- -L --- - ---- // 175: op=0b010101 ???\n010101 111 ------ -- -L --- - ---- // 176: op=0b010101 ???\n010110 000 ------ -- -L LHH - HLLH // 177: op=0b010110 ???\n010110 001 ------ -- -L LHH - HLLH // 178: op=0b010110 ???\n010110 010 ------ -- -L HLL - HLLH // 179: op=0b010110 ???\n010110 011 ------ -- -L HLL - HLLH // 180: op=0b010110 ???\n010110 100 ------ -- -L --- - ---- // 181: op=0b010110 ???\n010110 101 ------ -- -L --- - ---- // 182: op=0b010110 ???\n010110 110 ------ -- -L --- - ---- // 183: op=0b010110 ???\n010110 111 ------ -- -L --- - ---- // 184: op=0b010110 ???\n010111 000 ------ -- -L LHH - HLLH // 185: op=0b010111 ???\n010111 001 ------ -- -L LHH - HLLH // 186: op=0b010111 ???\n010111 010 ------ -- -L HLL - HLLH // 187: op=0b010111 ???\n010111 011 ------ -- -L HLL - HLLH // 188: op=0b010111 ???\n010111 100 ------ -- -L --- - ---- // 189: op=0b010111 ???\n010111 101 ------ -- -L --- - ---- // 190: op=0b010111 ???\n010111 110 ------ -- -L --- - ---- // 191: op=0b010111 ???\n010111 111 ------ -- -L --- - ---- // 192: op=0b010111 ???\n011000 000 LHLLLL LH HL LLL - LHLH // 193: op=0b011000 LD\n011000 001 LHLLLL LH HL LLL - LHLH // 194: op=0b011000 LD\n011000 010 ------ -- -L HLL - HLLH // 195: op=0b011000 LD\n011000 011 ------ -- -L HLL - HLLH // 196: op=0b011000 LD\n011000 100 ------ -- -L --- - ---- // 197: op=0b011000 LD\n011000 101 ------ -- -L --- - ---- // 198: op=0b011000 LD\n011000 110 ------ -- -L --- - ---- // 199: op=0b011000 LD\n011000 111 ------ -- -L --- - ---- // 200: op=0b011000 LD\n011001 000 LHLLLL LH LH LLL H ---L // 201: op=0b011001 ST\n011001 001 LHLLLL LH LH LLL H ---L // 202: op=0b011001 ST\n011001 010 ------ -- -L HLL - HLLH // 203: op=0b011001 ST\n011001 011 ------ -- -L HLL - HLLH // 204: op=0b011001 ST\n011001 100 ------ -- -L --- - ---- // 205: op=0b011001 ST\n011001 101 ------ -- -L --- - ---- // 206: op=0b011001 ST\n011001 110 ------ -- -L --- - ---- // 207: op=0b011001 ST\n011001 111 ------ -- -L --- - ---- // 208: op=0b011001 ST\n011010 000 ------ -- -L LHH - HLLH // 209: op=0b011010 ???\n011010 001 ------ -- -L LHH - HLLH // 210: op=0b011010 ???\n011010 010 ------ -- -L HLL - HLLH // 211: op=0b011010 ???\n011010 011 ------ -- -L HLL - HLLH // 212: op=0b011010 ???\n011010 100 ------ -- -L --- - ---- // 213: op=0b011010 ???\n011010 101 ------ -- -L --- - ---- // 214: op=0b011010 ???\n011010 110 ------ -- -L --- - ---- // 215: op=0b011010 ???\n011010 111 ------ -- -L --- - ---- // 216: op=0b011010 ???\n011011 000 ------ -- -L LHL - LLLH // 217: op=0b011011 JMP\n011011 001 ------ -- -L LHL - LLLH // 218: op=0b011011 JMP\n011011 010 ------ -- -L HLL - HLLH // 219: op=0b011011 JMP\n011011 011 ------ -- -L HLL - HLLH // 220: op=0b011011 JMP\n011011 100 ------ -- -L --- - ---- // 221: op=0b011011 JMP\n011011 101 ------ -- -L --- - ---- // 222: op=0b011011 JMP\n011011 110 ------ -- -L --- - ---- // 223: op=0b011011 JMP\n011011 111 ------ -- -L --- - ---- // 224: op=0b011011 JMP\n011100 000 ------ -- -L LLL - LLLH // 225: op=0b011100 BEQ\n011100 001 ------ -- -L LLH - LLLH // 226: op=0b011100 BEQ\n011100 010 ------ -- -L HLL - HLLH // 227: op=0b011100 BEQ\n011100 011 ------ -- -L HLL - HLLH // 228: op=0b011100 BEQ\n011100 100 ------ -- -L --- - ---- // 229: op=0b011100 BEQ\n011100 101 ------ -- -L --- - ---- // 230: op=0b011100 BEQ\n011100 110 ------ -- -L --- - ---- // 231: op=0b011100 BEQ\n011100 111 ------ -- -L --- - ---- // 232: op=0b011100 BEQ\n011101 000 ------ -- -L LLH - LLLH // 233: op=0b011101 BNE\n011101 001 ------ -- -L LLL - LLLH // 234: op=0b011101 BNE\n011101 010 ------ -- -L HLL - HLLH // 235: op=0b011101 BNE\n011101 011 ------ -- -L HLL - HLLH // 236: op=0b011101 BNE\n011101 100 ------ -- -L --- - ---- // 237: op=0b011101 BNE\n011101 101 ------ -- -L --- - ---- // 238: op=0b011101 BNE\n011101 110 ------ -- -L --- - ---- // 239: op=0b011101 BNE\n011101 111 ------ -- -L --- - ---- // 240: op=0b011101 BNE\n011110 000 ------ -- -L LHH - HLLH // 241: op=0b011110 ???\n011110 001 ------ -- -L LHH - HLLH // 242: op=0b011110 ???\n011110 010 ------ -- -L HLL - HLLH // 243: op=0b011110 ???\n011110 011 ------ -- -L HLL - HLLH // 244: op=0b011110 ???\n011110 100 ------ -- -L --- - ---- // 245: op=0b011110 ???\n011110 101 ------ -- -L --- - ---- // 246: op=0b011110 ???\n011110 110 ------ -- -L --- - ---- // 247: op=0b011110 ???\n011110 111 ------ -- -L --- - ---- // 248: op=0b011110 ???\n011111 000 HLHLHL H- HL LLL - LHLH // 249: op=0b011111 LDR\n011111 001 HLHLHL H- HL LLL - LHLH // 250: op=0b011111 LDR\n011111 010 ------ -- -L HLL - HLLH // 251: op=0b011111 LDR\n011111 011 ------ -- -L HLL - HLLH // 252: op=0b011111 LDR\n011111 100 ------ -- -L --- - ---- // 253: op=0b011111 LDR\n011111 101 ------ -- -L --- - ---- // 254: op=0b011111 LDR\n011111 110 ------ -- -L --- - ---- // 255: op=0b011111 LDR\n011111 111 ------ -- -L --- - ---- // 256: op=0b011111 LDR\n100000 000 LHLLLL LL -L LLL L LLHH // 257: op=0b100000 ADD\n100000 001 LHLLLL LL -L LLL L LLHH // 258: op=0b100000 ADD\n100000 010 ------ -- -L HLL - HLLH // 259: op=0b100000 ADD\n100000 011 ------ -- -L HLL - HLLH // 260: op=0b100000 ADD\n100000 100 ------ -- -L --- - ---- // 261: op=0b100000 ADD\n100000 101 ------ -- -L --- - ---- // 262: op=0b100000 ADD\n100000 110 ------ -- -L --- - ---- // 263: op=0b100000 ADD\n100000 111 ------ -- -L --- - ---- // 264: op=0b100000 ADD\n100001 000 LHLLLH LL -L LLL L LLHH // 265: op=0b100001 SUB\n100001 001 LHLLLH LL -L LLL L LLHH // 266: op=0b100001 SUB\n100001 010 ------ -- -L HLL - HLLH // 267: op=0b100001 SUB\n100001 011 ------ -- -L HLL - HLLH // 268: op=0b100001 SUB\n100001 100 ------ -- -L --- - ---- // 269: op=0b100001 SUB\n100001 101 ------ -- -L --- - ---- // 270: op=0b100001 SUB\n100001 110 ------ -- -L --- - ---- // 271: op=0b100001 SUB\n100001 111 ------ -- -L --- - ---- // 272: op=0b100001 SUB\n100010 000 ------ -- -L LHH - HLLH // 273: op=0b100010 MUL\n100010 001 ------ -- -L LHH - HLLH // 274: op=0b100010 MUL\n100010 010 ------ -- -L HLL - HLLH // 275: op=0b100010 MUL\n100010 011 ------ -- -L HLL - HLLH // 276: op=0b100010 MUL\n100010 100 ------ -- -L --- - ---- // 277: op=0b100010 MUL\n100010 101 ------ -- -L --- - ---- // 278: op=0b100010 MUL\n100010 110 ------ -- -L --- - ---- // 279: op=0b100010 MUL\n100010 111 ------ -- -L --- - ---- // 280: op=0b100010 MUL\n100011 000 ------ -- -L LHH - HLLH // 281: op=0b100011 DIV\n100011 001 ------ -- -L LHH - HLLH // 282: op=0b100011 DIV\n100011 010 ------ -- -L HLL - HLLH // 283: op=0b100011 DIV\n100011 011 ------ -- -L HLL - HLLH // 284: op=0b100011 DIV\n100011 100 ------ -- -L --- - ---- // 285: op=0b100011 DIV\n100011 101 ------ -- -L --- - ---- // 286: op=0b100011 DIV\n100011 110 ------ -- -L --- - ---- // 287: op=0b100011 DIV\n100011 111 ------ -- -L --- - ---- // 288: op=0b100011 DIV\n100100 000 LLLLHH LL -L LLL L LLHH // 289: op=0b100100 CMPEQ\n100100 001 LLLLHH LL -L LLL L LLHH // 290: op=0b100100 CMPEQ\n100100 010 ------ -- -L HLL - HLLH // 291: op=0b100100 CMPEQ\n100100 011 ------ -- -L HLL - HLLH // 292: op=0b100100 CMPEQ\n100100 100 ------ -- -L --- - ---- // 293: op=0b100100 CMPEQ\n100100 101 ------ -- -L --- - ---- // 294: op=0b100100 CMPEQ\n100100 110 ------ -- -L --- - ---- // 295: op=0b100100 CMPEQ\n100100 111 ------ -- -L --- - ---- // 296: op=0b100100 CMPEQ\n100101 000 LLLHLH LL -L LLL L LLHH // 297: op=0b100101 CMPLT\n100101 001 LLLHLH LL -L LLL L LLHH // 298: op=0b100101 CMPLT\n100101 010 ------ -- -L HLL - HLLH // 299: op=0b100101 CMPLT\n100101 011 ------ -- -L HLL - HLLH // 300: op=0b100101 CMPLT\n100101 100 ------ -- -L --- - ---- // 301: op=0b100101 CMPLT\n100101 101 ------ -- -L --- - ---- // 302: op=0b100101 CMPLT\n100101 110 ------ -- -L --- - ---- // 303: op=0b100101 CMPLT\n100101 111 ------ -- -L --- - ---- // 304: op=0b100101 CMPLT\n100110 000 LLLHHH LL -L LLL L LLHH // 305: op=0b100110 CMPLE\n100110 001 LLLHHH LL -L LLL L LLHH // 306: op=0b100110 CMPLE\n100110 010 ------ -- -L HLL - HLLH // 307: op=0b100110 CMPLE\n100110 011 ------ -- -L HLL - HLLH // 308: op=0b100110 CMPLE\n100110 100 ------ -- -L --- - ---- // 309: op=0b100110 CMPLE\n100110 101 ------ -- -L --- - ---- // 310: op=0b100110 CMPLE\n100110 110 ------ -- -L --- - ---- // 311: op=0b100110 CMPLE\n100110 111 ------ -- -L --- - ---- // 312: op=0b100110 CMPLE\n100111 000 ------ -- -L LHH - HLLH // 313: op=0b100111 ???\n100111 001 ------ -- -L LHH - HLLH // 314: op=0b100111 ???\n100111 010 ------ -- -L HLL - HLLH // 315: op=0b100111 ???\n100111 011 ------ -- -L HLL - HLLH // 316: op=0b100111 ???\n100111 100 ------ -- -L --- - ---- // 317: op=0b100111 ???\n100111 101 ------ -- -L --- - ---- // 318: op=0b100111 ???\n100111 110 ------ -- -L --- - ---- // 319: op=0b100111 ???\n100111 111 ------ -- -L --- - ---- // 320: op=0b100111 ???\n101000 000 HLHLLL LL -L LLL L LLHH // 321: op=0b101000 AND\n101000 001 HLHLLL LL -L LLL L LLHH // 322: op=0b101000 AND\n101000 010 ------ -- -L HLL - HLLH // 323: op=0b101000 AND\n101000 011 ------ -- -L HLL - HLLH // 324: op=0b101000 AND\n101000 100 ------ -- -L --- - ---- // 325: op=0b101000 AND\n101000 101 ------ -- -L --- - ---- // 326: op=0b101000 AND\n101000 110 ------ -- -L --- - ---- // 327: op=0b101000 AND\n101000 111 ------ -- -L --- - ---- // 328: op=0b101000 AND\n101001 000 HLHHHL LL -L LLL L LLHH // 329: op=0b101001 OR\n101001 001 HLHHHL LL -L LLL L LLHH // 330: op=0b101001 OR\n101001 010 ------ -- -L HLL - HLLH // 331: op=0b101001 OR\n101001 011 ------ -- -L HLL - HLLH // 332: op=0b101001 OR\n101001 100 ------ -- -L --- - ---- // 333: op=0b101001 OR\n101001 101 ------ -- -L --- - ---- // 334: op=0b101001 OR\n101001 110 ------ -- -L --- - ---- // 335: op=0b101001 OR\n101001 111 ------ -- -L --- - ---- // 336: op=0b101001 OR\n101010 000 HLLHHL LL -L LLL L LLHH // 337: op=0b101010 XOR\n101010 001 HLLHHL LL -L LLL L LLHH // 338: op=0b101010 XOR\n101010 010 ------ -- -L HLL - HLLH // 339: op=0b101010 XOR\n101010 011 ------ -- -L HLL - HLLH // 340: op=0b101010 XOR\n101010 100 ------ -- -L --- - ---- // 341: op=0b101010 XOR\n101010 101 ------ -- -L --- - ---- // 342: op=0b101010 XOR\n101010 110 ------ -- -L --- - ---- // 343: op=0b101010 XOR\n101010 111 ------ -- -L --- - ---- // 344: op=0b101010 XOR\n101011 000 HLHLLH LL -L LLL L LLHH // 345: op=0b101011 XNOR\n101011 001 HLHLLH LL -L LLL L LLHH // 346: op=0b101011 XNOR\n101011 010 ------ -- -L HLL - HLLH // 347: op=0b101011 XNOR\n101011 011 ------ -- -L HLL - HLLH // 348: op=0b101011 XNOR\n101011 100 ------ -- -L --- - ---- // 349: op=0b101011 XNOR\n101011 101 ------ -- -L --- - ---- // 350: op=0b101011 XNOR\n101011 110 ------ -- -L --- - ---- // 351: op=0b101011 XNOR\n101011 111 ------ -- -L --- - ---- // 352: op=0b101011 XNOR\n101100 000 HHLLLL LL -L LLL L LLHH // 353: op=0b101100 SHL\n101100 001 HHLLLL LL -L LLL L LLHH // 354: op=0b101100 SHL\n101100 010 ------ -- -L HLL - HLLH // 355: op=0b101100 SHL\n101100 011 ------ -- -L HLL - HLLH // 356: op=0b101100 SHL\n101100 100 ------ -- -L --- - ---- // 357: op=0b101100 SHL\n101100 101 ------ -- -L --- - ---- // 358: op=0b101100 SHL\n101100 110 ------ -- -L --- - ---- // 359: op=0b101100 SHL\n101100 111 ------ -- -L --- - ---- // 360: op=0b101100 SHL\n101101 000 HHLLLH LL -L LLL L LLHH // 361: op=0b101101 SHR\n101101 001 HHLLLH LL -L LLL L LLHH // 362: op=0b101101 SHR\n101101 010 ------ -- -L HLL - HLLH // 363: op=0b101101 SHR\n101101 011 ------ -- -L HLL - HLLH // 364: op=0b101101 SHR\n101101 100 ------ -- -L --- - ---- // 365: op=0b101101 SHR\n101101 101 ------ -- -L --- - ---- // 366: op=0b101101 SHR\n101101 110 ------ -- -L --- - ---- // 367: op=0b101101 SHR\n101101 111 ------ -- -L --- - ---- // 368: op=0b101101 SHR\n101110 000 HHLLHH LL -L LLL L LLHH // 369: op=0b101110 SRA\n101110 001 HHLLHH LL -L LLL L LLHH // 370: op=0b101110 SRA\n101110 010 ------ -- -L HLL - HLLH // 371: op=0b101110 SRA\n101110 011 ------ -- -L HLL - HLLH // 372: op=0b101110 SRA\n101110 100 ------ -- -L --- - ---- // 373: op=0b101110 SRA\n101110 101 ------ -- -L --- - ---- // 374: op=0b101110 SRA\n101110 110 ------ -- -L --- - ---- // 375: op=0b101110 SRA\n101110 111 ------ -- -L --- - ---- // 376: op=0b101110 SRA\n101111 000 ------ -- -L LHH - HLLH // 377: op=0b101111 ???\n101111 001 ------ -- -L LHH - HLLH // 378: op=0b101111 ???\n101111 010 ------ -- -L HLL - HLLH // 379: op=0b101111 ???\n101111 011 ------ -- -L HLL - HLLH // 380: op=0b101111 ???\n101111 100 ------ -- -L --- - ---- // 381: op=0b101111 ???\n101111 101 ------ -- -L --- - ---- // 382: op=0b101111 ???\n101111 110 ------ -- -L --- - ---- // 383: op=0b101111 ???\n101111 111 ------ -- -L --- - ---- // 384: op=0b101111 ???\n110000 000 LHLLLL LH -L LLL - LLHH // 385: op=0b110000 ADDC\n110000 001 LHLLLL LH -L LLL - LLHH // 386: op=0b110000 ADDC\n110000 010 ------ -- -L HLL - HLLH // 387: op=0b110000 ADDC\n110000 011 ------ -- -L HLL - HLLH // 388: op=0b110000 ADDC\n110000 100 ------ -- -L --- - ---- // 389: op=0b110000 ADDC\n110000 101 ------ -- -L --- - ---- // 390: op=0b110000 ADDC\n110000 110 ------ -- -L --- - ---- // 391: op=0b110000 ADDC\n110000 111 ------ -- -L --- - ---- // 392: op=0b110000 ADDC\n110001 000 LHLLLH LH -L LLL - LLHH // 393: op=0b110001 SUBC\n110001 001 LHLLLH LH -L LLL - LLHH // 394: op=0b110001 SUBC\n110001 010 ------ -- -L HLL - HLLH // 395: op=0b110001 SUBC\n110001 011 ------ -- -L HLL - HLLH // 396: op=0b110001 SUBC\n110001 100 ------ -- -L --- - ---- // 397: op=0b110001 SUBC\n110001 101 ------ -- -L --- - ---- // 398: op=0b110001 SUBC\n110001 110 ------ -- -L --- - ---- // 399: op=0b110001 SUBC\n110001 111 ------ -- -L --- - ---- // 400: op=0b110001 SUBC\n110010 000 ------ -- -L LHH - HLLH // 401: op=0b110010 MULC\n110010 001 ------ -- -L LHH - HLLH // 402: op=0b110010 MULC\n110010 010 ------ -- -L HLL - HLLH // 403: op=0b110010 MULC\n110010 011 ------ -- -L HLL - HLLH // 404: op=0b110010 MULC\n110010 100 ------ -- -L --- - ---- // 405: op=0b110010 MULC\n110010 101 ------ -- -L --- - ---- // 406: op=0b110010 MULC\n110010 110 ------ -- -L --- - ---- // 407: op=0b110010 MULC\n110010 111 ------ -- -L --- - ---- // 408: op=0b110010 MULC\n110011 000 ------ -- -L LHH - HLLH // 409: op=0b110011 DIVC\n110011 001 ------ -- -L LHH - HLLH // 410: op=0b110011 DIVC\n110011 010 ------ -- -L HLL - HLLH // 411: op=0b110011 DIVC\n110011 011 ------ -- -L HLL - HLLH // 412: op=0b110011 DIVC\n110011 100 ------ -- -L --- - ---- // 413: op=0b110011 DIVC\n110011 101 ------ -- -L --- - ---- // 414: op=0b110011 DIVC\n110011 110 ------ -- -L --- - ---- // 415: op=0b110011 DIVC\n110011 111 ------ -- -L --- - ---- // 416: op=0b110011 DIVC\n110100 000 LLLLHH LH -L LLL - LLHH // 417: op=0b110100 CMPEQC\n110100 001 LLLLHH LH -L LLL - LLHH // 418: op=0b110100 CMPEQC\n110100 010 ------ -- -L HLL - HLLH // 419: op=0b110100 CMPEQC\n110100 011 ------ -- -L HLL - HLLH // 420: op=0b110100 CMPEQC\n110100 100 ------ -- -L --- - ---- // 421: op=0b110100 CMPEQC\n110100 101 ------ -- -L --- - ---- // 422: op=0b110100 CMPEQC\n110100 110 ------ -- -L --- - ---- // 423: op=0b110100 CMPEQC\n110100 111 ------ -- -L --- - ---- // 424: op=0b110100 CMPEQC\n110101 000 LLLHLH LH -L LLL - LLHH // 425: op=0b110101 CMPLTC\n110101 001 LLLHLH LH -L LLL - LLHH // 426: op=0b110101 CMPLTC\n110101 010 ------ -- -L HLL - HLLH // 427: op=0b110101 CMPLTC\n110101 011 ------ -- -L HLL - HLLH // 428: op=0b110101 CMPLTC\n110101 100 ------ -- -L --- - ---- // 429: op=0b110101 CMPLTC\n110101 101 ------ -- -L --- - ---- // 430: op=0b110101 CMPLTC\n110101 110 ------ -- -L --- - ---- // 431: op=0b110101 CMPLTC\n110101 111 ------ -- -L --- - ---- // 432: op=0b110101 CMPLTC\n110110 000 LLLHHH LH -L LLL - LLHH // 433: op=0b110110 CMPLEC\n110110 001 LLLHHH LH -L LLL - LLHH // 434: op=0b110110 CMPLEC\n110110 010 ------ -- -L HLL - HLLH // 435: op=0b110110 CMPLEC\n110110 011 ------ -- -L HLL - HLLH // 436: op=0b110110 CMPLEC\n110110 100 ------ -- -L --- - ---- // 437: op=0b110110 CMPLEC\n110110 101 ------ -- -L --- - ---- // 438: op=0b110110 CMPLEC\n110110 110 ------ -- -L --- - ---- // 439: op=0b110110 CMPLEC\n110110 111 ------ -- -L --- - ---- // 440: op=0b110110 CMPLEC\n110111 000 ------ -- -L LHH - HLLH // 441: op=0b110111 ???\n110111 001 ------ -- -L LHH - HLLH // 442: op=0b110111 ???\n110111 010 ------ -- -L HLL - HLLH // 443: op=0b110111 ???\n110111 011 ------ -- -L HLL - HLLH // 444: op=0b110111 ???\n110111 100 ------ -- -L --- - ---- // 445: op=0b110111 ???\n110111 101 ------ -- -L --- - ---- // 446: op=0b110111 ???\n110111 110 ------ -- -L --- - ---- // 447: op=0b110111 ???\n110111 111 ------ -- -L --- - ---- // 448: op=0b110111 ???\n111000 000 HLHLLL LH -L LLL - LLHH // 449: op=0b111000 ANDC\n111000 001 HLHLLL LH -L LLL - LLHH // 450: op=0b111000 ANDC\n111000 010 ------ -- -L HLL - HLLH // 451: op=0b111000 ANDC\n111000 011 ------ -- -L HLL - HLLH // 452: op=0b111000 ANDC\n111000 100 ------ -- -L --- - ---- // 453: op=0b111000 ANDC\n111000 101 ------ -- -L --- - ---- // 454: op=0b111000 ANDC\n111000 110 ------ -- -L --- - ---- // 455: op=0b111000 ANDC\n111000 111 ------ -- -L --- - ---- // 456: op=0b111000 ANDC\n111001 000 HLHHHL LH -L LLL - LLHH // 457: op=0b111001 ORC\n111001 001 HLHHHL LH -L LLL - LLHH // 458: op=0b111001 ORC\n111001 010 ------ -- -L HLL - HLLH // 459: op=0b111001 ORC\n111001 011 ------ -- -L HLL - HLLH // 460: op=0b111001 ORC\n111001 100 ------ -- -L --- - ---- // 461: op=0b111001 ORC\n111001 101 ------ -- -L --- - ---- // 462: op=0b111001 ORC\n111001 110 ------ -- -L --- - ---- // 463: op=0b111001 ORC\n111001 111 ------ -- -L --- - ---- // 464: op=0b111001 ORC\n111010 000 HLLHHL LH -L LLL - LLHH // 465: op=0b111010 XORC\n111010 001 HLLHHL LH -L LLL - LLHH // 466: op=0b111010 XORC\n111010 010 ------ -- -L HLL - HLLH // 467: op=0b111010 XORC\n111010 011 ------ -- -L HLL - HLLH // 468: op=0b111010 XORC\n111010 100 ------ -- -L --- - ---- // 469: op=0b111010 XORC\n111010 101 ------ -- -L --- - ---- // 470: op=0b111010 XORC\n111010 110 ------ -- -L --- - ---- // 471: op=0b111010 XORC\n111010 111 ------ -- -L --- - ---- // 472: op=0b111010 XORC\n111011 000 HLHLLH LH -L LLL - LLHH // 473: op=0b111011 XNORC\n111011 001 HLHLLH LH -L LLL - LLHH // 474: op=0b111011 XNORC\n111011 010 ------ -- -L HLL - HLLH // 475: op=0b111011 XNORC\n111011 011 ------ -- -L HLL - HLLH // 476: op=0b111011 XNORC\n111011 100 ------ -- -L --- - ---- // 477: op=0b111011 XNORC\n111011 101 ------ -- -L --- - ---- // 478: op=0b111011 XNORC\n111011 110 ------ -- -L --- - ---- // 479: op=0b111011 XNORC\n111011 111 ------ -- -L --- - ---- // 480: op=0b111011 XNORC\n111100 000 HHLLLL LH -L LLL - LLHH // 481: op=0b111100 SHLC\n111100 001 HHLLLL LH -L LLL - LLHH // 482: op=0b111100 SHLC\n111100 010 ------ -- -L HLL - HLLH // 483: op=0b111100 SHLC\n111100 011 ------ -- -L HLL - HLLH // 484: op=0b111100 SHLC\n111100 100 ------ -- -L --- - ---- // 485: op=0b111100 SHLC\n111100 101 ------ -- -L --- - ---- // 486: op=0b111100 SHLC\n111100 110 ------ -- -L --- - ---- // 487: op=0b111100 SHLC\n111100 111 ------ -- -L --- - ---- // 488: op=0b111100 SHLC\n111101 000 HHLLLH LH -L LLL - LLHH // 489: op=0b111101 SHRC\n111101 001 HHLLLH LH -L LLL - LLHH // 490: op=0b111101 SHRC\n111101 010 ------ -- -L HLL - HLLH // 491: op=0b111101 SHRC\n111101 011 ------ -- -L HLL - HLLH // 492: op=0b111101 SHRC\n111101 100 ------ -- -L --- - ---- // 493: op=0b111101 SHRC\n111101 101 ------ -- -L --- - ---- // 494: op=0b111101 SHRC\n111101 110 ------ -- -L --- - ---- // 495: op=0b111101 SHRC\n111101 111 ------ -- -L --- - ---- // 496: op=0b111101 SHRC\n111110 000 HHLLHH LH -L LLL - LLHH // 497: op=0b111110 SRAC\n111110 001 HHLLHH LH -L LLL - LLHH // 498: op=0b111110 SRAC\n111110 010 ------ -- -L HLL - HLLH // 499: op=0b111110 SRAC\n111110 011 ------ -- -L HLL - HLLH // 500: op=0b111110 SRAC\n111110 100 ------ -- -L --- - ---- // 501: op=0b111110 SRAC\n111110 101 ------ -- -L --- - ---- // 502: op=0b111110 SRAC\n111110 110 ------ -- -L --- - ---- // 503: op=0b111110 SRAC\n111110 111 ------ -- -L --- - ---- // 504: op=0b111110 SRAC\n111111 000 ------ -- -L LHH - HLLH // 505: op=0b111111 ???\n111111 001 ------ -- -L LHH - HLLH // 506: op=0b111111 ???\n111111 010 ------ -- -L HLL - HLLH // 507: op=0b111111 ???\n111111 011 ------ -- -L HLL - HLLH // 508: op=0b111111 ???\n111111 100 ------ -- -L --- - ---- // 509: op=0b111111 ???\n111111 101 ------ -- -L --- - ---- // 510: op=0b111111 ???\n111111 110 ------ -- -L --- - ---- // 511: op=0b111111 ???\n111111 111 ------ -- -L --- - ---- // 512: op=0b111111 ???\n\n.plot X(OP[5:0])\n.plot RESET\n.plot IRQ\n.plot Z\n.plot X(ALUFN[5:0])\n.plot ASEL\n.plot BSEL\n.plot MOE\n.plot MWR\n.plot X(PCSEL[2:0])\n.plot RA2SEL\n.plot WASEL\n.plot X(WDSEL[1:0])\n.plot WERF\n\n"]],"schematic":[["port",[48,32,4],{"signal":"ra2sel","direction":"out"}],["port",[48,-48,4],{"signal":"asel","direction":"out"}],["port",[48,-32,4],{"signal":"bsel","direction":"out"}],["port",[48,-64,4],{"signal":"alufn[5:0]","direction":"out"}],["port",[48,64,4],{"signal":"wdsel[1:0]","direction":"out"}],["port",[48,48,4],{"signal":"wasel","direction":"out"}],["port",[48,80,4],{"signal":"werf","direction":"out"}],["port",[48,16,4],{"signal":"pcsel[2:0]","direction":"out"}],["port",[48,-16,4],{"signal":"moe","direction":"out"}],["port",[48,0,4],{"signal":"mwr","direction":"out"}],["port",[-144,-16,0],{"signal":"op[5:0]"}],["port",[-144,-64,0],{"signal":"reset"}],["port",[-144,-48,0],{"signal":"irq"}],["port",[-144,-32,0],{"signal":"z"}]]}, "/beta/pc":{"properties":{"name":{"label":"Name","type":"string","value":"","edit":"yes","choices":[""]},"test-readonly":{"label":"test-readonly","type":"string","value":"true","edit":"yes","choices":[""]}},"icon":[["terminal",[-8,8,0],{"name":"ID[15:0]"}],["terminal",[-8,24,0],{"name":"JT[31:2]"}],["terminal",[88,24,4],{"name":"PC[31:0]"}],["text",[40,-3,0],{"text":"PC","align":"center","font":"bold 6pt sans-serif"}],["text",[1,8,0],{"text":"ID[15:0]","font":"4pt sans-serif"}],["text",[1,24,0],{"text":"JT[31:2]","font":"4pt sans-serif"}],["text",[1,56,0],{"text":"RESET","font":"4pt sans-serif"}],["text",[79,24,0],{"text":"PC[31:0]","font":"4pt sans-serif","align":"center-right"}],["terminal",[-8,40,0],{"name":"PCSEL[2:0]"}],["text",[1,40,1],{"text":"PCSEL[2:0]","font":"4pt sans-serif","align":"bottom-center"}],["line",[0,76,1,-4,-8]],["line",[8,72,1,-4,8]],["terminal",[88,40,4],{"name":"PC_INC[31:0]"}],["text",[79,40,0],{"text":"PC_INC[31:0]","font":"4pt sans-serif","align":"center-right"}],["property",[40,-10,0],{"format":"{name}","align":"bottom-center"}],["terminal",[-8,56,0],{"name":"RESET"}],["terminal",[-8,72,0],{"name":"CLK"}],["terminal",[88,56,4],{"name":"PC_OFFSET[31:0]"}],["text",[79,56,0],{"text":"PC_OFFSET[31:0]","font":"4pt sans-serif","align":"center-right"}],["line",[0,-8,0,0,88]],["line",[0,80,0,80,0]],["line",[80,80,0,0,-88]],["line",[80,-8,0,-80,0]]],"test":[["test",".power Vdd=1\n.thresholds Vol=0 Vil=0.1 Vih=0.9 Voh=1\n\n.group inputs RESET PCSEL[2:0] ID[15:0] JT[31:0]\n.group outputs PC[31:0] PC_INC[31:0] PC_OFFSET[31:0]\n\n.mode gate\n\n.cycle CLK=0 assert inputs tran 50n CLK=1 tran 49n sample outputs tran 1n\n\n1 011 1111111111111111 00000000000000000000000000000000 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 1: reset, PC==0x80000000\n1 011 1111111111111111 00000000000000000000000000000000 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 1: reset, PC==0x80000000\n1 100 0000000000000000 00000000000000000000000000000000 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL // 2: reset, PC==0x80000000\n0 100 1111111111111110 00000000000000000000000000000000 HLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLL HLLLLLLLLLLLLLLLLLLLLLLLLLLLHHLL HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL // 3: xadr, PC==0x80000008, offset=-2\n0 011 0111111111111111 00000000000000000000000000000000 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL HLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLL HLLLLLLLLLLLLLHLLLLLLLLLLLLLLHLL // 4: illop, PC==0x80000004, offset=0x7fff\n0 010 0000000000000000 11111111111111111111111111110000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHLLLL HHHHHHHHHHHHHHHHHHHHHHHHHHHHLHLL HHHHHHHHHHHHHHHHHHHHHHHHHHHHLHLL // 5: jmp, pc==0XFFFFFFF0\n0 000 1111111111111111 00000000000000000000000000000000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHLHLL HHHHHHHHHHHHHHHHHHHHHHHHHHHHHLLL HHHHHHHHHHHHHHHHHHHHHHHHHHHHLHLL // 6: inc, pc==0xFFFFFFF4, offset=-1\n0 000 1111111111111110 00000000000000000000000000000000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHLLL HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLL HHHHHHHHHHHHHHHHHHHHHHHHHHHHLHLL // 7: inc, pc==0xFFFFFFF8, offset=-1\n0 000 1111111111111101 00000000000000000000000000000000 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLL HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HHHHHHHHHHHHHHHHHHHHHHHHHHHHLHLL // 8: inc, pc==0xFFFFFFFC, offset=-1\n0 000 1111111111111100 00000000000000000000000000000000 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL HHHHHHHHHHHHHHHHHHHHHHHHHHHHLHLL // 9: inc, pc==0x80000000, offset=-1\n0 010 1000000000000000 01111111111111111111111111111111 LHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LHHHHHHHHHHHHHHLLLLLLLLLLLLLLLLL // 10: jmp to user mode, PC==0x7FFFFFFC, offset=0x8000\n0 010 1111111111110111 10000111011001010100001100100001 LLLLLHHHLHHLLHLHLHLLLLHHLLHLLLLL LLLLLHHHLHHLLHLHLHLLLLHHLLHLLHLL LLLLLHHHLHHLLHLHLHLLLLHHLLLLLLLL // 11: jmp to super mode?, PC==0x07654320, offset=-9\n0 010 0000000000000000 00000000000000000000000000000100 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLL // 12: jmp, PC==0x0\n0 000 0000000000000000 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHLL // 13: inc\n0 000 0000000000000000 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLL // 14: inc\n0 000 0000000000000000 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL // 15: inc\n0 001 0000000000000010 00000000000000000000000011110000 LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHLL LLLLLLLLLLLLLLLLLLLLLLLLLLHLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL // 16: br, offset=3, PC==0x1C\n0 000 0000000000000000 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLHLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL // 17: inc\n0 010 0000000000000000 00000000000000000000000000111100 LLLLLLLLLLLLLLLLLLLLLLLLLLHHHHLL LLLLLLLLLLLLLLLLLLLLLLLLLHLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLHLLLLLL // 18: jmp, PC==0x3C\n0 000 0000000000000000 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLHLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLHLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLHLLLHLL // 19: inc\n0 010 0000000000000000 00000000000000000000000001111100 LLLLLLLLLLLLLLLLLLLLLLLLLHHHHHLL LLLLLLLLLLLLLLLLLLLLLLLLHLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLHLLLLLLL // 20: jmp, PC==0x7C\n0 000 0000000000000000 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLHLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLHLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLHLLLLHLL // 21: inc\n0 010 0000000000000000 00000000000000001111111111111100 LLLLLLLLLLLLLLLLHHHHHHHHHHHHHHLL LLLLLLLLLLLLLLLHLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLHLLLLLLLLLLLLLLLL // 22: jmp, PC==0xFFFC\n0 000 0000000000000000 00000000000000000000000000000000 LLLLLLLLLLLLLLLHLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLHLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLHLLLLLLLLLLLLLHLL // 23: inc\n0 010 0000000000000000 00000000111111111111111111111100 LLLLLLLLHHHHHHHHHHHHHHHHHHHHHHLL LLLLLLLHLLLLLLLLLLLLLLLLLLLLLLLL LLLLLLLHLLLLLLLLLLLLLLLLLLLLLLLL // 24: jmp, PC==0xFFFFFC\n0 000 0000000000000000 00000000000000000000000000000000 LLLLLLLHLLLLLLLLLLLLLLLLLLLLLLLL LLLLLLLHLLLLLLLLLLLLLLLLLLLLLHLL LLLLLLLHLLLLLLLLLLLLLLLLLLLLLHLL // 25: inc\n0 010 0000000000000000 01111111111111111111111111111100 LHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 26: jmp, PC==0x7FFFFFFC\n0 000 1111111111111110 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLL // 27: inc\n\n.plot CLK\n.plot RESET\n.plot B(PCSEL[2:0])\n.plot X(ID[15:0])\n.plot X(JT[31:0])\n.plot X(PC[31:0])\n.plot X(PC_INC[31:0])\n.plot X(PC_OFFSET[31:0])"]],"schematic":[["port",[-136,-48,0],{"signal":"CLK"}],["port",[-136,-32,0],{"signal":"RESET"}],["port",[-136,0,0],{"signal":"ID[15:0]"}],["port",[-136,16,0],{"signal":"JT[31:0]"}],["port",[-136,-16,0],{"signal":"PCSEL[2:0]"}],["port",[24,-48,4],{"signal":"PC[31:0]","direction":"out"}],["port",[24,-16,4],{"signal":"PC_INC[31:0]","direction":"out"}],["port",[24,-32,4],{"signal":"PC_OFFSET[31:0]","direction":"out"}]]}, "/beta/regfile":{"properties":{"name":{"edit":"yes","type":"name","value":"","label":"Name"},"test-readonly":{"label":"test-readonly","type":"string","value":"true","edit":"yes","choices":[""]}},"schematic":[["port",[-40,-40,4],{"signal":"radata[31:0]","direction":"out"}],["port",[-40,-24,4],{"signal":"rbdata[31:0]","direction":"out"}],["port",[-152,-8,0],{"signal":"rc[4:0]"}],["port",[-152,56,0],{"signal":"werf"}],["port",[-152,72,0],{"signal":"clk"}],["port",[-152,-24,0],{"signal":"rb[4:0]"}],["port",[-152,-40,0],{"signal":"ra[4:0]"}],["port",[-152,40,0],{"signal":"wdata[31:0]"}],["port",[-152,24,0],{"signal":"wasel"}],["port",[-152,8,0],{"signal":"ra2sel"}]],"icon":[["terminal",[-64,-40,0],{"name":"rc[4:0]"}],["terminal",[-64,-8,0],{"name":"werf"}],["terminal",[-64,8,0],{"name":"clk"}],["terminal",[80,-24,4],{"name":"wdata[31:0]"}],["terminal",[-24,-80,1],{"name":"ra[4:0]"}],["terminal",[40,-80,1],{"name":"rb[4:0]"}],["terminal",[-24,32,3],{"name":"radata[31:0]"}],["terminal",[40,32,3],{"name":"rbdata[31:0]"}],["text",[-55,-40,0],{"text":"RC[4:0]","font":"4pt sans-serif"}],["text",[-55,-8,0],{"text":"WERF","font":"4pt sans-serif"}],["text",[71,-24,0],{"text":"WDATA[31:0]","font":"4pt sans-serif","align":"center-right"}],["line",[-56,6,0,4,2]],["line",[-52,8,0,-4,2]],["text",[-24,-71,0],{"text":"RA[4:0]","font":"4pt sans-serif","align":"top-center"}],["text",[40,-71,0],{"text":"RB[4:0]","font":"4pt sans-serif","align":"top-center"}],["text",[-24,23,0],{"text":"RADATA[31:0]","font":"4pt sans-serif","align":"bottom-center"}],["text",[40,23,0],{"text":"RBDATA[31:0]","font":"4pt sans-serif","align":"bottom-center"}],["text",[8,-24,0],{"text":"REGFILE","font":"bold 6pt sans-serif","align":"center"}],["line",[-56,-72,0,128,0]],["line",[-56,24,0,128,0]],["terminal",[-64,-24,0],{"name":"wasel"}],["terminal",[-64,-56,0],{"name":"ra2sel"}],["text",[-55,-56,0],{"text":"RA2SEL","font":"4pt sans-serif"}],["text",[-55,-24,0],{"text":"WASEL","font":"4pt sans-serif"}],["line",[72,-72,0,0,96]],["line",[-56,-72,0,0,96]],["property",[8,-73,0],{"format":"{name}","align":"bottom-center"}]],"test":[["test",".power Vdd=1\n.thresholds Vol=0 Vil=0.1 Vih=0.9 Voh=1\n\n.group inputs RA2SEL WASEL WERF RA[4:0] RB[4:0] RC[4:0] WDATA[31:0]\n\n.group outputs RADATA[31:0] RBDATA[31:0]\n\n.mode gate\n\n.cycle CLK=0 tran 1n CLK=1 tran 1n assert inputs tran 49n CLK=0 tran 48n sample outputs tran 1n\n\n00 0 11111 11111 00000 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 1: Ra[31]==0, Rb[31]==0\n00 1 00000 00000 00000 00000000000000000000000000000000 -------------------------------- -------------------------------- // 2: Ra[0]==None, Rb[0]==None Reg[0]=0\n00 1 00000 00000 00001 00000000000000000000000000000001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 3: Ra[0]==0, Rb[0]==0 Reg[1]=1\n00 1 00001 00000 00010 00000000000000000000000000000010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 4: Ra[1]==1, Rb[0]==0 Reg[2]=2\n00 1 00010 00001 00011 00000000000000000000000000000011 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 5: Ra[2]==2, Rb[1]==1 Reg[3]=3\n00 1 00011 00010 00100 00000000000000000000000000000100 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHL // 6: Ra[3]==3, Rb[2]==2 Reg[4]=4\n00 1 00100 00011 00101 00000000000000000000000000000101 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHH // 7: Ra[4]==4, Rb[3]==3 Reg[5]=5\n00 1 00101 00100 00110 00000000000000000000000000000110 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL // 8: Ra[5]==5, Rb[4]==4 Reg[6]=6\n00 1 00110 00101 00111 00000000000000000000000000000111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLH // 9: Ra[6]==6, Rb[5]==5 Reg[7]=7\n00 1 00111 00110 01000 00000000000000000000000000001000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHL // 10: Ra[7]==7, Rb[6]==6 Reg[8]=8\n00 1 01000 00111 01001 00000000000000000000000000001001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHH // 11: Ra[8]==8, Rb[7]==7 Reg[9]=9\n00 1 01001 01000 01010 00000000000000000000000000001010 LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLL // 12: Ra[9]==9, Rb[8]==8 Reg[10]=10\n00 1 01010 01001 01011 00000000000000000000000000001011 LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLHL LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLH // 13: Ra[10]==10, Rb[9]==9 Reg[11]=11\n00 1 01011 01010 01100 00000000000000000000000000001100 LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLHL // 14: Ra[11]==11, Rb[10]==10 Reg[12]=12\n00 1 01100 01011 01101 00000000000000000000000000001101 LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLHH // 15: Ra[12]==12, Rb[11]==11 Reg[13]=13\n00 1 01101 01100 01110 00000000000000000000000000001110 LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHLL // 16: Ra[13]==13, Rb[12]==12 Reg[14]=14\n00 1 01110 01101 01111 00000000000000000000000000001111 LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHL LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHLH // 17: Ra[14]==14, Rb[13]==13 Reg[15]=15\n00 1 01111 01110 10000 00000000000000000000000000010000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHL // 18: Ra[15]==15, Rb[14]==14 Reg[16]=16\n00 1 10000 01111 10001 00000000000000000000000000010001 LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHH // 19: Ra[16]==16, Rb[15]==15 Reg[17]=17\n00 1 10001 10000 10010 00000000000000000000000000010010 LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLL // 20: Ra[17]==17, Rb[16]==16 Reg[18]=18\n00 1 10010 10001 10011 00000000000000000000000000010011 LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLHL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLH // 21: Ra[18]==18, Rb[17]==17 Reg[19]=19\n00 1 10011 10010 10100 00000000000000000000000000010100 LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLHH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLHL // 22: Ra[19]==19, Rb[18]==18 Reg[20]=20\n00 1 10100 10011 10101 00000000000000000000000000010101 LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLHH // 23: Ra[20]==20, Rb[19]==19 Reg[21]=21\n00 1 10101 10100 10110 00000000000000000000000000010110 LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL // 24: Ra[21]==21, Rb[20]==20 Reg[22]=22\n00 1 10110 10101 10111 00000000000000000000000000010111 LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHHL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLH // 25: Ra[22]==22, Rb[21]==21 Reg[23]=23\n00 1 10111 10110 11000 00000000000000000000000000011000 LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHHH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHHL // 26: Ra[23]==23, Rb[22]==22 Reg[24]=24\n00 1 11000 10111 11001 00000000000000000000000000011001 LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHHH // 27: Ra[24]==24, Rb[23]==23 Reg[25]=25\n00 1 11001 11000 11010 00000000000000000000000000011010 LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL // 28: Ra[25]==25, Rb[24]==24 Reg[26]=26\n00 1 11010 11001 11011 00000000000000000000000000011011 LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLHL LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLH // 29: Ra[26]==26, Rb[25]==25 Reg[27]=27\n00 1 11011 11010 11100 00000000000000000000000000011100 LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLHH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLHL // 30: Ra[27]==27, Rb[26]==26 Reg[28]=28\n00 1 11100 11011 11101 00000000000000000000000000011101 LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLHH // 31: Ra[28]==28, Rb[27]==27 Reg[29]=29\n00 1 11101 11100 11110 00000000000000000000000000011110 LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHLL // 32: Ra[29]==29, Rb[28]==28 Reg[30]=30\n00 1 11110 11101 11111 00000000000000000000000000011111 LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHHL LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHLH // 33: Ra[30]==30, Rb[29]==29 Reg[31]=31\n00 0 11111 11110 11111 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHHL // 34: Ra[31]==0, Rb[30]==30\n00 0 00000 11111 11111 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 35: Ra[0]==0, Rb[31]==0\n10 0 00001 00010 00011 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHH // 36: Ra[1]==1, Rc[3]==3\n10 0 00001 00010 11111 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL // 37: Ra[1]==1, Rc[31]==0\n10 0 00001 11111 00100 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL // 38: Ra[1]==1, Rc[4]==4\n01 1 00001 00010 11111 00000000000000000011000000111001 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHL // 39: Ra[1]==1, Rb[2]==2 Reg[30]=12345\n00 0 11110 00001 00010 00000000000000000000000000000000 LLLLLLLLLLLLLLLLLLHHLLLLLLHHHLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH // 40: Ra[30]==12345, Rb[1]==1\n01 1 00001 00010 00011 00000000101111000110000101001110 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHL // 41: Ra[1]==1, Rb[2]==2 Reg[30]=12345678\n10 0 11110 00010 11110 00000000000000000000000000000000 LLLLLLLLHLHHHHLLLHHLLLLHLHLLHHHL LLLLLLLLHLHHHHLLLHHLLLLHLHLLHHHL // 42: Ra[30]==12345678, Rc[30]==12345678\n00 0 00001 00010 00011 00000000101111000110000101001110 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHL // 43: Ra[1]==1, Rb[2]==2\n00 0 00011 00011 00011 00000000101111000110000101001110 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHH // 44: Ra[3]==3, Rb[3]==3\n\n.plot CLK\n.plot RA2SEL\n.plot WERF\n.plot X(RA[4:0])\n.plot X(RB[4:0])\n.plot X(RC[4:0])\n.plot X(WDATA[31:0])\n.plot X(RADATA[31:0])\n.plot X(RBDATA[31:0])\n"]]}, "/beta/test":{"properties":{"name":{"edit":"yes","type":"name","value":"","label":"Name"},"readonly":{"label":"readonly","type":"string","value":"true","edit":"yes","choices":[""]}},"schematic":[["/beta/beta",[-128,40,0],{"name":"beta"}],["memory",[48,-24,0],{"name":"Main","nports":"3","naddr":"10","ndata":"32","contents":"+ 0x73df000a 0x73ff0003 0x6ffe0000 0xc3e00000 0x73fffffe 0xd01e0004 0x73e00002 0x801ef800\n+ 0x73fffffa 0xc0210001 0x6ffe0000 0x73ff0002 0xc01f0005 0x73fffff5 0xd01f0000 0x77e00002\n+ 0xc01f0006 0x73fffff1 0xd81f0000 0x77e00002 0xc01f0007 0x73ffffed 0xd41f0001 0x77e00002\n+ 0xc01f0008 0x73ffffe9 0xd01fffff 0x73e00002 0xc01f0009 0x73ffffe5 0xd81fffff 0x73e00002\n+ 0xc01f000a 0x73ffffe1 0xd41fffff 0x73e00002 0xc01f000b 0x73ffffdd 0xc03f0001 0xf021001f\n+ 0xc4410001 0xa4611000 0xd063ffff 0x77e30002 0xc01f000c 0x73ffffd5 0x98611000 0x77e30002\n+ 0xc01f000d 0x73ffffd1 0x98620800 0x73e30002 0xc01f000e 0x73ffffcd 0x801ff800 0x73e00002\n+ 0xc01f000f 0x73ffffc9 0xc01f0000 0x73e00002 0xc01f0010 0x73ffffc5 0x9020f800 0xd0010001\n+ 0x77e00002 0xc01f0012 0x73ffffc0 0xf0410001 0xd0020002 0x77e00002 0xc01f0013 0x73ffffbb\n+ 0x80611000 0xd0030003 0x77e00002 0xc01f0014 0x73ffffb6 0xc0810003 0xd0040004 0x77e00002\n+ 0xc01f0015 0x73ffffb1 0xe8bfffff 0xe8a5fffa 0xd0050005 0x77e00002 0xc01f0016 0x73ffffab\n+ 0xa4c41000 0xd0060006 0x77e00002 0xc01f0017 0x73ffffa6 0xc4ff0001 0xf4e7001d 0xd0070007\n+ 0x77e00002 0xc01f0018 0x73ffffa0 0xb1011800 0xd0080008 0x77e00002 0xc01f0019 0x73ffff9b\n+ 0x99284000 0xc529fff8 0xd0090009 0x77e00002 0xc01f001a 0x73ffff95 0xa9481000 0xd00a000a\n+ 0x77e00002 0xc01f001b 0x73ffff90 0xe5630008 0xd00b000b 0x77e00002 0xc01f001c 0x73ffff8b\n+ 0x859f0800 0xf58c001d 0x818c2800 0xd00c000c 0x77e00002 0xc01f0018 0x73ffff84 0xa5a82800\n+ 0xd00d000d 0x77e00002 0xc01f001e 0x73ffff7f 0x95cc6800 0x81cd7000 0xd00e000e 0x77e00002\n+ 0xc01f001f 0x73ffff79 0xf1e10004 0x85ef0800 0xd00f000f 0x77e00002 0xc01f0020 0x73ffff73\n+ 0xb60f1000 0x82106800 0xd0100010 0x77e00002 0xc01f0021 0x73ffff6d 0xee30fffe 0xd0110011\n+ 0x77e00002 0xc01f0022 0x73ffff68 0xa24f1000 0xe6520010 0xd0120012 0x77e00002 0xc01f0023\n+ 0x73ffff62 0xba6c1000 0xae709800 0xee730000 0xd0130013 0x77e00002 0xc01f0024 0x73ffff5b\n+ 0xc29f001f 0xe2940014 0xd0140014 0x77e00002 0xc01f0025 0x73ffff55 0xe6b40001 0xd0150015\n+ 0x77e00002 0xc01f0026 0x73ffff50 0xc2d10005 0xd0160016 0x77e00002 0xc01f0027 0x73ffff4b\n+ 0xaaf60800 0xd0170017 0x77e00002 0xc01f0028 0x73ffff46 0xe31700fc 0x83182000 0xd0180018\n+ 0x77e00002 0xc01f0029 0x73ffff40 0x8337c000 0xc339ffea 0xd0190019 0x77e00002 0xc01f002a\n+ 0x73ffff3a 0xb3431800 0xa742d000 0xd01a001a 0x77e00002 0xc01f002b 0x73ffff34 0x836e6800\n+ 0xd01b001b 0x77e00002 0xc01f002c 0x73ffff2f 0xc797fffb 0xd01c001c 0x77e00002 0xc01f002d\n+ 0x73ffff2a 0xc7bfffe3 0xd01d001d 0x77e00002 0xc01f002e 0x73ffff25 0xc3df001f 0xf7de0001\n+ 0xf3de0001 0xd01e001e 0x77e00002 0xc01f002f 0x73ffff1e 0x7000ff1d 0xc3fe0011 0x73ff0002\n+ 0xc01f0030 0x73ffff19 0xc23f03c4 0xf021001f 0xa6218800 0x6f910000 0x77ff0002 0xc01f0032\n+ 0x73ffff12 0xf39c0001 0xf79c0001 0xd2fc03b8 0x77f70002 0xc01f0033 0x73ffff0c 0x7f1f00c0\n+ 0x7f3f00c0 0x8358c800 0xd37affff 0x77fb0002 0xc01f0034 0x73ffff05 0x8358c000 0x875ac800\n+ 0xd37affff 0x77fb0002 0xc01f0035 0x73fffeff 0x8359c800 0x875ac000 0x73fa0002 0xc01f0036\n+ 0x73fffefa 0xc23f0001 0xc6510001 0x73f20002 0xc01f0037 0x73fffef5 0xc17f0f0f 0xc19f7f00\n+ 0xa1ab6000 0xd1cd0f00 0x77ee0002 0xc01f0038 0x73fffeee 0xa5ab6000 0xd1cd7f0f 0x77ee0002\n+ 0xc01f0039 0x73fffee9 0xa9ab6000 0xd1cd700f 0x77ee0002 0xc01f003a 0x73fffee4 0xadab6000\n+ 0xd1cd8ff0 0x77ee0002 0xc01f003b 0x73fffedf 0xc37f0001 0xf39b0020 0xd3bc0001 0x77fd0002\n+ 0xc01f003c 0x73fffed9 0xf39b001f 0xfb5c0011 0xd33ac000 0x77f90002 0xc01f003d 0x73fffed3\n+ 0xf75c0011 0xd33a4000 0x77f90002 0xc01f003e 0x73fffece 0xc3df0000 0xc03f0000 0x00000014\n+ 0xf3de0001 0xf7de0001 0xd01e04e0 0x77e00002 0xc01f003f 0x73fffec5 0x04000000 0x08000000\n+ 0x0c000000 0x10000000 0x14000000 0x18000000 0x1c000000 0x20000000 0x24000000 0x28000000\n+ 0x2c000000 0x30000000 0x34000000 0x38000000 0x3c000000 0x40000000 0x44000000 0x48000000\n+ 0x4c000000 0x50000000 0x54000000 0x58000000 0x5c000000 0x68000000 0x78000000 0x9c000000\n+ 0xbc000000 0xdc000000 0xfc000000 0xd001001e 0x77e00002 0xc01f0040 0x73fffea4 0xc09f06e8\n+ 0x7d3f0057 0xe809ffff 0x65240000 0x641f06ec 0x65240008 0x641f06f4 0x60c40000 0x7cbf0051\n+ 0x90064800 0x77e00002 0xc01f0041 0x73fffe97 0x60ff06ec 0x90072800 0x77e00002 0xc01f0042\n+ 0x73fffe92 0x61040008 0x90084800 0x77e00002 0xc01f0043 0x73fffe8d 0x613f06f4 0x90092800\n+ 0x77e00002 0xc01f0044 0x73fffe88 0x801fa000 0x80200000 0x80400000 0x80600000 0x80800000\n+ 0x80a11000 0x80a32800 0x80a42800 0xd00500a0 0x77e00002 0xc01f0045 0x73fffe7c 0x741f0000\n+ 0x80200000 0x80400000 0x80600000 0x80800000 0x80a11000 0x80a32800 0x80a42800 0xd0053100\n+ 0x77e00002 0xc01f0046 0x73fffe70 0xc01f0654 0x6fe00000 0x73ff0001 0x73ff0003 0x77ff0002\n+ 0xc01f0047 0x73fffe69 0xd01e0658 0x77e00002 0xc01f0048 0x73fffe65 0xc01f068c 0xc03f0001\n+ 0xf021001f 0xa4010000 0x6c200000 0x701f0000 0xd0200690 0x77e10002 0xc01f0049 0x73fffe5b\n+ 0x601f06e0 0x73e00007 0x601f06e4 0x73e00005 0xc01f0000 0x77e00003 0xc03f0001 0xc05f0020\n+ 0x77e10002 0xc01f004a 0x73fffe50 0xf0210001 0xc4420001 0x77e2fffa 0xc3ff0000 0x73fffffe\n+ 0xaaaaaaaa 0x55555555 0x00000000 0x00000000 0x00000000 0x00000000\n"}],["wire",[120,-24,0,8,0],{"signal":"id[31:0]"}],["wire",[120,16,0,8,0],{"signal":"mrd[31:0]"}],["wire",[120,56,0,8,0],{"signal":"mwd[31:0]"}],["wire",[48,-24,0,-8,0],{"signal":"ia[11:2]"}],["wire",[48,-16,0,-8,0],{"signal":"1'1"}],["wire",[48,-8,0,-8,0],{"signal":"0'1"}],["wire",[48,0,0,-8,0],{"signal":"0'1"}],["wire",[48,16,0,-8,0],{"signal":"ma[11:2]"}],["wire",[48,32,0,-8,0],{"signal":"0'1"}],["wire",[48,40,0,-8,0],{"signal":"0'1"}],["wire",[48,56,0,-8,0],{"signal":"ma[11:2]"}],["wire",[48,64,0,-8,0],{"signal":"0'1"}],["wire",[48,72,0,-8,0],{"signal":"mwr"}],["wire",[48,80,0,-8,0],{"signal":"clk"}],["wire",[-160,56,0,-8,0],{"signal":"clk"}],["wire",[-160,40,0,-8,0],{"signal":"reset"}],["wire",[-160,24,0,-8,0],{"signal":"irq"}],["wire",[-160,8,0,-8,0],{"signal":"mrd[31:0]"}],["wire",[-160,-8,0,-8,0],{"signal":"id[31:0]"}],["wire",[-64,-8,0,8,0],{"signal":"ia[31:0]"}],["wire",[-64,8,0,8,0],{"signal":"ma[31:0]"}],["wire",[-64,24,0,8,0],{"signal":"moe"}],["wire",[-64,40,0,8,0],{"signal":"mwr"}],["wire",[-64,56,0,8,0],{"signal":"mwd[31:0]"}],["wire",[48,24,0,-8,0],{"signal":"moe"}],["text",[21,-81,0],{"text":"The contents of main memory have"}],["text",[22,-70,0],{"text":"been initialized with the binary for"}],["text",[22,-59,0],{"text":"Beta test program."}]],"test":[["test",".power Vdd=1\n.thresholds Vol=0 Vil=0.1 Vih=0.9 Voh=1\n\n.group inputs RESET IRQ\n.group outputs IA[31:0] ID[31:0] MA[31:0] MOE MWR MRD[31:0] MWD[31:0]\n\n.mode gate\n\n.cycle CLK=1 tran 5n assert inputs tran 45n CLK=0 tran 49n sample outputs tran 1n\n\n10 -------------------------------- -------------------------------- -------------------------------- -L -------------------------------- -------------------------------- // 1: reset\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL LHHHLLHHHHLHHHHHLLLLLLLLLLLLHLHL -------------------------------- -L -------------------------------- -------------------------------- // 2: [000] BEQ(R31,0x2c,R30)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 3: [02c] BEQ(R31,0x38,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHHHLLL HHLHLLLLLLLHHHHHLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 4: [038] CMPEQC(R31,0x0,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHHHHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 5: [03c] BNE(R0,0x48,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLHLLHLLL HHLHHLLLLLLHHHHHLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 6: [048] CMPLEC(R31,0x0,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLHLLHHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 7: [04c] BNE(R0,0x58,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLHLHHLLL HHLHLHLLLLLHHHHHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 8: [058] CMPLTC(R31,0x1,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLHLHHHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 9: [05c] BNE(R0,0x68,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLHHLHLLL HHLHLLLLLLLHHHHHHHHHHHHHHHHHHHHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 10: [068] CMPEQC(R31,0xffff,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLHHLHHLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 11: [06c] BEQ(R0,0x78,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLHHHHLLL HHLHHLLLLLLHHHHHHHHHHHHHHHHHHHHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 12: [078] CMPLEC(R31,0xffff,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLHHHHHLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 13: [07c] BEQ(R0,0x88,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHLLLHLLL HHLHLHLLLLLHHHHHHHHHHHHHHHHHHHHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 14: [088] CMPLTC(R31,0xffff,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHLLLHHLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 15: [08c] BEQ(R0,0x98,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHLLHHLLL HHLLLLLLLLHHHHHHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 16: [098] ADDC(R31,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHLLHHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLHHHHH HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 17: [09c] SHLC(R1,0x1f,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHLHLLLLL HHLLLHLLLHLLLLLHLLLLLLLLLLLLLLLH LHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH -L -------------------------------- -------------------------------- // 18: [0a0] SUBC(R1,0x1,R2)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHLHLLHLL HLHLLHLLLHHLLLLHLLLHLLLLLLLLLLLL HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH -L -------------------------------- -------------------------------- // 19: [0a4] OR(R1,R2,R3)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHLHLHLLL HHLHLLLLLHHLLLHHHHHHHHHHHHHHHHHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 20: [0a8] CMPEQC(R3,0xffff,R3)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHLHLHHLL LHHHLHHHHHHLLLHHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 21: [0ac] BNE(R3,0xb8,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHLHHHLLL HLLHHLLLLHHLLLLHLLLHLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 22: [0b8] CMPLE(R1,R2,R3)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHLHHHHLL LHHHLHHHHHHLLLHHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 23: [0bc] BNE(R3,0xc8,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHHLLHLLL HLLHHLLLLHHLLLHLLLLLHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 24: [0c8] CMPLE(R2,R1,R3)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHHLLHHLL LHHHLLHHHHHLLLHHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 25: [0cc] BEQ(R3,0xd8,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHHLHHLLL HLLLLLLLLLLHHHHHHHHHHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 26: [0d8] ADD(R31,R31,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHHLHHHLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 27: [0dc] BEQ(R0,0xe8,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHHHLHLLL HHLLLLLLLLLHHHHHLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 28: [0e8] ADDC(R31,0x0,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHHHLHHLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 29: [0ec] BEQ(R0,0xf8,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHHHHHLLL HLLHLLLLLLHLLLLLHHHHHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 30: [0f8] CMPEQ(R0,R31,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLHHHHHHLL HHLHLLLLLLLLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 31: [0fc] CMPEQC(R1,0x1,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLLLLLLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 32: [100] BNE(R0,0x10c,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLLLLHHLL HHHHLLLLLHLLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHL -L -------------------------------- -------------------------------- // 33: [10c] SHLC(R1,0x1,R2)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLLLHLLLL HHLHLLLLLLLLLLHLLLLLLLLLLLLLLLHL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 34: [110] CMPEQC(R2,0x2,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLLLHLHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 35: [114] BNE(R0,0x120,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLLHLLLLL HLLLLLLLLHHLLLLHLLLHLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHH -L -------------------------------- -------------------------------- // 36: [120] ADD(R1,R2,R3)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLLHLLHLL HHLHLLLLLLLLLLHHLLLLLLLLLLLLLLHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 37: [124] CMPEQC(R3,0x3,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLLHLHLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 38: [128] BNE(R0,0x134,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLLHHLHLL HHLLLLLLHLLLLLLHLLLLLLLLLLLLLLHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL -L -------------------------------- -------------------------------- // 39: [134] ADDC(R1,0x3,R4)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLLHHHLLL HHLHLLLLLLLLLHLLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 40: [138] CMPEQC(R4,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLLHHHHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 41: [13c] BNE(R0,0x148,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLHLLHLLL HHHLHLLLHLHHHHHHHHHHHHHHHHHHHHHH HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH -L -------------------------------- -------------------------------- // 42: [148] XORC(R31,0xffff,R5)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLHLLHHLL HHHLHLLLHLHLLHLHHHHHHHHHHHHHHLHL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLH -L -------------------------------- -------------------------------- // 43: [14c] XORC(R5,0xfffa,R5)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLHLHLLLL HHLHLLLLLLLLLHLHLLLLLLLLLLLLLHLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 44: [150] CMPEQC(R5,0x5,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLHLHLHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 45: [154] BNE(R0,0x160,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLHHLLLLL HLHLLHLLHHLLLHLLLLLHLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHL -L -------------------------------- -------------------------------- // 46: [160] OR(R4,R2,R6)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLHHLLHLL HHLHLLLLLLLLLHHLLLLLLLLLLLLLLHHL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 47: [164] CMPEQC(R6,0x6,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLHHLHLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 48: [168] BNE(R0,0x174,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLHHHLHLL HHLLLHLLHHHHHHHHLLLLLLLLLLLLLLLH HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH -L -------------------------------- -------------------------------- // 49: [174] SUBC(R31,0x1,R7)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLHHHHLLL HHHHLHLLHHHLLHHHLLLLLLLLLLLHHHLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHH -L -------------------------------- -------------------------------- // 50: [178] SHRC(R7,0x1d,R7)\n00 HLLLLLLLLLLLLLLLLLLLLLLHLHHHHHLL HHLHLLLLLLLLLHHHLLLLLLLLLLLLLHHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 51: [17c] CMPEQC(R7,0x7,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHLLLLLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 52: [180] BNE(R0,0x18c,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHLLLHHLL HLHHLLLHLLLLLLLHLLLHHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLL -L -------------------------------- -------------------------------- // 53: [18c] SHL(R1,R3,R8)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHLLHLLLL HHLHLLLLLLLLHLLLLLLLLLLLLLLLHLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 54: [190] CMPEQC(R8,0x8,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHLLHLHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 55: [194] BNE(R0,0x1a0,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHLHLLLLL HLLHHLLHLLHLHLLLLHLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 56: [1a0] CMPLE(R8,R8,R9)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHLHLLHLL HHLLLHLHLLHLHLLHHHHHHHHHHHHHHLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLH -L -------------------------------- -------------------------------- // 57: [1a4] SUBC(R9,0xfff8,R9)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHLHLHLLL HHLHLLLLLLLLHLLHLLLLLLLLLLLLHLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 58: [1a8] CMPEQC(R9,0x9,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHLHLHHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 59: [1ac] BNE(R0,0x1b8,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHLHHHLLL HLHLHLLHLHLLHLLLLLLHLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLHL -L -------------------------------- -------------------------------- // 60: [1b8] XOR(R8,R2,R10)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHLHHHHLL HHLHLLLLLLLLHLHLLLLLLLLLLLLLHLHL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 61: [1bc] CMPEQC(R10,0xa,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHHLLLLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 62: [1c0] BNE(R0,0x1cc,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHHLLHHLL HHHLLHLHLHHLLLHHLLLLLLLLLLLLHLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLHH -L -------------------------------- -------------------------------- // 63: [1cc] ORC(R3,0x8,R11)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHHLHLLLL HHLHLLLLLLLLHLHHLLLLLLLLLLLLHLHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 64: [1d0] CMPEQC(R11,0xb,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHHLHLHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 65: [1d4] BNE(R0,0x1e0,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHHHLLLLL HLLLLHLHHLLHHHHHLLLLHLLLLLLLLLLL HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH -L -------------------------------- -------------------------------- // 66: [1e0] SUB(R31,R1,R12)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHHHLLHLL HHHHLHLHHLLLHHLLLLLLLLLLLLLHHHLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHH -L -------------------------------- -------------------------------- // 67: [1e4] SHRC(R12,0x1d,R12)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHHHLHLLL HLLLLLLHHLLLHHLLLLHLHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHLL -L -------------------------------- -------------------------------- // 68: [1e8] ADD(R12,R5,R12)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHHHLHHLL HHLHLLLLLLLLHHLLLLLLLLLLLLLLHHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 69: [1ec] CMPEQC(R12,0xc,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHHHHLLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 70: [1f0] BNE(R0,0x1fc,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLHHHHHHHLL HLHLLHLHHLHLHLLLLLHLHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHLH -L -------------------------------- -------------------------------- // 71: [1fc] OR(R8,R5,R13)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLLLLLLLL HHLHLLLLLLLLHHLHLLLLLLLLLLLLHHLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 72: [200] CMPEQC(R13,0xd,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLLLLLHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 73: [204] BNE(R0,0x210,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLLLHLLLL HLLHLHLHHHLLHHLLLHHLHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 74: [210] CMPLT(R12,R13,R14)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLLLHLHLL HLLLLLLHHHLLHHLHLHHHLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHL -L -------------------------------- -------------------------------- // 75: [214] ADD(R13,R14,R14)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLLLHHLLL HHLHLLLLLLLLHHHLLLLLLLLLLLLLHHHL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 76: [218] CMPEQC(R14,0xe,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLLLHHHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 77: [21c] BNE(R0,0x228,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLLHLHLLL HHHHLLLHHHHLLLLHLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLL -L -------------------------------- -------------------------------- // 78: [228] SHLC(R1,0x4,R15)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLLHLHHLL HLLLLHLHHHHLHHHHLLLLHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHH -L -------------------------------- -------------------------------- // 79: [22c] SUB(R15,R1,R15)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLLHHLLLL HHLHLLLLLLLLHHHHLLLLLLLLLLLLHHHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 80: [230] CMPEQC(R15,0xf,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLLHHLHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 81: [234] BNE(R0,0x240,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLHLLLLLL HLHHLHHLLLLLHHHHLLLHLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHH -L -------------------------------- -------------------------------- // 82: [240] SHR(R15,R2,R16)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLHLLLHLL HLLLLLHLLLLHLLLLLHHLHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLL -L -------------------------------- -------------------------------- // 83: [244] ADD(R16,R13,R16)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLHLLHLLL HHLHLLLLLLLHLLLLLLLLLLLLLLLHLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 84: [248] CMPEQC(R16,0x10,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLHLLHHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 85: [24c] BNE(R0,0x258,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLHLHHLLL HHHLHHHLLLHHLLLLHHHHHHHHHHHHHHHL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLH -L -------------------------------- -------------------------------- // 86: [258] XNORC(R16,0xfffe,R17)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLHLHHHLL HHLHLLLLLLLHLLLHLLLLLLLLLLLHLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 87: [25c] CMPEQC(R17,0x11,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLHHLLLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 88: [260] BNE(R0,0x26c,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLHHLHHLL HLHLLLHLLHLLHHHHLLLHLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHL -L -------------------------------- -------------------------------- // 89: [26c] AND(R15,R2,R18)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLHHHLLLL HHHLLHHLLHLHLLHLLLLLLLLLLLLHLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLHL -L -------------------------------- -------------------------------- // 90: [270] ORC(R18,0x10,R18)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLHHHLHLL HHLHLLLLLLLHLLHLLLLLLLLLLLLHLLHL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 91: [274] CMPEQC(R18,0x12,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHLLHHHHLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 92: [278] BNE(R0,0x284,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHLLLLHLL HLHHHLHLLHHLHHLLLLLHLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHH -L -------------------------------- -------------------------------- // 93: [284] SRA(R12,R2,R19)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHLLLHLLL HLHLHHHLLHHHLLLLHLLHHLLLLLLLLLLL HHHHHHHHHHHHHHHHHHHHHHHHHHHLHHLL -L -------------------------------- -------------------------------- // 94: [288] XNOR(R16,R19,R19)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHLLLHHLL HHHLHHHLLHHHLLHHLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLHH -L -------------------------------- -------------------------------- // 95: [28c] XNORC(R19,0x0,R19)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHLLHLLLL HHLHLLLLLLLHLLHHLLLLLLLLLLLHLLHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 96: [290] CMPEQC(R19,0x13,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHLLHLHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 97: [294] BNE(R0,0x2a0,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHLHLLLLL HHLLLLHLHLLHHHHHLLLLLLLLLLLHHHHH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHHH -L -------------------------------- -------------------------------- // 98: [2a0] ADDC(R31,0x1f,R20)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHLHLLHLL HHHLLLHLHLLHLHLLLLLLLLLLLLLHLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL -L -------------------------------- -------------------------------- // 99: [2a4] ANDC(R20,0x14,R20)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHLHLHLLL HHLHLLLLLLLHLHLLLLLLLLLLLLLHLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 100: [2a8] CMPEQC(R20,0x14,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHLHLHHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 101: [2ac] BNE(R0,0x2b8,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHLHHHLLL HHHLLHHLHLHHLHLLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLH -L -------------------------------- -------------------------------- // 102: [2b8] ORC(R20,0x1,R21)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHLHHHHLL HHLHLLLLLLLHLHLHLLLLLLLLLLLHLHLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 103: [2bc] CMPEQC(R21,0x15,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHHLLLLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 104: [2c0] BNE(R0,0x2cc,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHHLLHHLL HHLLLLHLHHLHLLLHLLLLLLLLLLLLLHLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHHL -L -------------------------------- -------------------------------- // 105: [2cc] ADDC(R17,0x5,R22)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHHLHLLLL HHLHLLLLLLLHLHHLLLLLLLLLLLLHLHHL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 106: [2d0] CMPEQC(R22,0x16,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHHLHLHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 107: [2d4] BNE(R0,0x2e0,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHHHLLLLL HLHLHLHLHHHHLHHLLLLLHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHHH -L -------------------------------- -------------------------------- // 108: [2e0] XOR(R22,R1,R23)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHHHLLHLL HHLHLLLLLLLHLHHHLLLLLLLLLLLHLHHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 109: [2e4] CMPEQC(R23,0x17,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHHHLHLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 110: [2e8] BNE(R0,0x2f4,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHHHHLHLL HHHLLLHHLLLHLHHHLLLLLLLLHHHHHHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL -L -------------------------------- -------------------------------- // 111: [2f4] ANDC(R23,0xfc,R24)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHHHHHLLL HLLLLLHHLLLHHLLLLLHLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL -L -------------------------------- -------------------------------- // 112: [2f8] ADD(R24,R4,R24)\n00 HLLLLLLLLLLLLLLLLLLLLLHLHHHHHHLL HHLHLLLLLLLHHLLLLLLLLLLLLLLHHLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 113: [2fc] CMPEQC(R24,0x18,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLLLLLLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 114: [300] BNE(R0,0x30c,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLLLLHHLL HLLLLLHHLLHHLHHHHHLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLHLHHHH -L -------------------------------- -------------------------------- // 115: [30c] ADD(R23,R24,R25)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLLLHLLLL HHLLLLHHLLHHHLLHHHHHHHHHHHHLHLHL LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLH -L -------------------------------- -------------------------------- // 116: [310] ADDC(R25,0xffea,R25)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLLLHLHLL HHLHLLLLLLLHHLLHLLLLLLLLLLLHHLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 117: [314] CMPEQC(R25,0x19,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLLLHHLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 118: [318] BNE(R0,0x324,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLLHLLHLL HLHHLLHHLHLLLLHHLLLHHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL -L -------------------------------- -------------------------------- // 119: [324] SHL(R3,R3,R26)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLLHLHLLL HLHLLHHHLHLLLLHLHHLHLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLHL -L -------------------------------- -------------------------------- // 120: [328] OR(R2,R26,R26)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLLHLHHLL HHLHLLLLLLLHHLHLLLLLLLLLLLLHHLHL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 121: [32c] CMPEQC(R26,0x1a,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLLHHLLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 122: [330] BNE(R0,0x33c,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLLHHHHLL HLLLLLHHLHHLHHHLLHHLHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLHH -L -------------------------------- -------------------------------- // 123: [33c] ADD(R14,R13,R27)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLHLLLLLL HHLHLLLLLLLHHLHHLLLLLLLLLLLHHLHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 124: [340] CMPEQC(R27,0x1b,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLHLLLHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 125: [344] BNE(R0,0x350,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLHLHLLLL HHLLLHHHHLLHLHHHHHHHHHHHHHHHHLHH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHLL -L -------------------------------- -------------------------------- // 126: [350] SUBC(R23,0xfffb,R28)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLHLHLHLL HHLHLLLLLLLHHHLLLLLLLLLLLLLHHHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 127: [354] CMPEQC(R28,0x1c,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLHLHHLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 128: [358] BNE(R0,0x364,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLHHLLHLL HHLLLHHHHLHHHHHHHHHHHHHHHHHLLLHH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHLH -L -------------------------------- -------------------------------- // 129: [364] SUBC(R31,0xffe3,R29)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLHHLHLLL HHLHLLLLLLLHHHLHLLLLLLLLLLLHHHLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 130: [368] CMPEQC(R29,0x1d,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLHHLHHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 131: [36c] BNE(R0,0x378,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLHHHHLLL HHLLLLHHHHLHHHHHLLLLLLLLLLLHHHHH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHHH -L -------------------------------- -------------------------------- // 132: [378] ADDC(R31,0x1f,R30)\n00 HLLLLLLLLLLLLLLLLLLLLLHHLHHHHHLL HHHHLHHHHHLHHHHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHH -L -------------------------------- -------------------------------- // 133: [37c] SHRC(R30,0x1,R30)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHLLLLLLL HHHHLLHHHHLHHHHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHHL -L -------------------------------- -------------------------------- // 134: [380] SHLC(R30,0x1,R30)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHLLLLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLHHHHL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 135: [384] CMPEQC(R30,0x1e,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHLLLHLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 136: [388] BNE(R0,0x394,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHLLHLHLL LHHHLLLLLLLLLLLLHHHHHHHHLLLHHHLH -------------------------------- -L -------------------------------- -------------------------------- // 137: [394] BEQ(R0,0xc,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHLLHHLLL HHLLLLHHHHHHHHHLLLLLLLLLLLLHLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLHLHHHH -L -------------------------------- -------------------------------- // 138: [398] ADDC(R30,0x11,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHLLHHHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 139: [39c] BEQ(R31,0x3a8,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHLHLHLLL HHLLLLHLLLHHHHHHLLLLLLHHHHLLLHLL LLLLLLLLLLLLLLLLLLLLLLHHHHLLLHLL -L -------------------------------- -------------------------------- // 140: [3a8] ADDC(R31,0x3c4,R17)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHLHLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLHHHHH HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 141: [3ac] SHLC(R1,0x1f,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHLHHLLLL HLHLLHHLLLHLLLLHHLLLHLLLLLLLLLLL HLLLLLLLLLLLLLLLLLLLLLHHHHLLLHLL -L -------------------------------- -------------------------------- // 142: [3b0] OR(R1,R17,R17)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHLHHLHLL LHHLHHHHHLLHLLLHLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 143: [3b4] JMP(R17,R28)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHHLLLHLL HHHHLLHHHLLHHHLLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLHHHLHHHLLLL -L -------------------------------- -------------------------------- // 144: [3c4] SHLC(R28,0x1,R28)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHHLLHLLL HHHHLHHHHLLHHHLLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLHHHLHHHLLL -L -------------------------------- -------------------------------- // 145: [3c8] SHRC(R28,0x1,R28)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHHLLHHLL HHLHLLHLHHHHHHLLLLLLLLHHHLHHHLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 146: [3cc] CMPEQC(R28,0x3b8,R23)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHHLHLLLL LHHHLHHHHHHHLHHHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 147: [3d0] BNE(R23,0x3dc,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHHLHHHLL LHHHHHHHLLLHHHHHLLLLLLLLHHLLLLLL LLLLLLLLLLLLLLLLLLLLLHHLHHHLLLLL HL HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL -------------------------------- // 148: [3dc] LDR(0x6e0,R24)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHHHLLLLL LHHHHHHHLLHHHHHHLLLLLLLLHHLLLLLL LLLLLLLLLLLLLLLLLLLLLHHLHHHLLHLL HL LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH -------------------------------- // 149: [3e0] LDR(0x6e4,R25)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHHHLLHLL HLLLLLHHLHLHHLLLHHLLHLLLLLLLLLLL HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH -L -------------------------------- -------------------------------- // 150: [3e4] ADD(R24,R25,R26)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHHHLHLLL HHLHLLHHLHHHHLHLHHHHHHHHHHHHHHHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 151: [3e8] CMPEQC(R26,0xffff,R27)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHHHLHHLL LHHHLHHHHHHHHLHHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 152: [3ec] BNE(R27,0x3f8,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHHHHHLLL HLLLLLHHLHLHHLLLHHLLLLLLLLLLLLLL LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLL -L -------------------------------- -------------------------------- // 153: [3f8] ADD(R24,R24,R26)\n00 HLLLLLLLLLLLLLLLLLLLLLHHHHHHHHLL HLLLLHHHLHLHHLHLHHLLHLLLLLLLLLLL HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH -L -------------------------------- -------------------------------- // 154: [3fc] SUB(R26,R25,R26)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLLLLLLLL HHLHLLHHLHHHHLHLHHHHHHHHHHHHHHHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 155: [400] CMPEQC(R26,0xffff,R27)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLLLLLHLL LHHHLHHHHHHHHLHHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 156: [404] BNE(R27,0x410,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLLLHLLLL HLLLLLHHLHLHHLLHHHLLHLLLLLLLLLLL HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL -L -------------------------------- -------------------------------- // 157: [410] ADD(R25,R25,R26)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLLLHLHLL HLLLLHHHLHLHHLHLHHLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 158: [414] SUB(R26,R24,R26)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLLLHHLLL LHHHLLHHHHHHHLHLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 159: [418] BEQ(R26,0x424,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLLHLLHLL HHLLLLHLLLHHHHHHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 160: [424] ADDC(R31,0x1,R17)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLLHLHLLL HHLLLHHLLHLHLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 161: [428] SUBC(R17,0x1,R18)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLLHLHHLL LHHHLLHHHHHHLLHLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 162: [42c] BEQ(R18,0x438,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLLHHHLLL HHLLLLLHLHHHHHHHLLLLHHHHLLLLHHHH LLLLLLLLLLLLLLLLLLLLHHHHLLLLHHHH -L -------------------------------- -------------------------------- // 163: [438] ADDC(R31,0xf0f,R11)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLLHHHHLL HHLLLLLHHLLHHHHHLHHHHHHHLLLLLLLL LLLLLLLLLLLLLLLLLHHHHHHHLLLLLLLL -L -------------------------------- -------------------------------- // 164: [43c] ADDC(R31,0x7f00,R12)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLHLLLLLL HLHLLLLHHLHLHLHHLHHLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLHHHHLLLLLLLL -L -------------------------------- -------------------------------- // 165: [440] AND(R11,R12,R13)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLHLLLHLL HHLHLLLHHHLLHHLHLLLLHHHHLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 166: [444] CMPEQC(R13,0xf00,R14)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLHLLHLLL LHHHLHHHHHHLHHHLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 167: [448] BNE(R14,0x454,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLHLHLHLL HLHLLHLHHLHLHLHHLHHLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLHHHHHHHLLLLHHHH -L -------------------------------- -------------------------------- // 168: [454] OR(R11,R12,R13)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLHLHHLLL HHLHLLLHHHLLHHLHLHHHHHHHLLLLHHHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 169: [458] CMPEQC(R13,0x7f0f,R14)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLHLHHHLL LHHHLHHHHHHLHHHLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 170: [45c] BNE(R14,0x468,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLHHLHLLL HLHLHLLHHLHLHLHHLHHLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLHHHLLLLLLLLHHHH -L -------------------------------- -------------------------------- // 171: [468] XOR(R11,R12,R13)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLHHLHHLL HHLHLLLHHHLLHHLHLHHHLLLLLLLLHHHH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 172: [46c] CMPEQC(R13,0x700f,R14)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLHHHLLLL LHHHLHHHHHHLHHHLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 173: [470] BNE(R14,0x47c,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLLLHHHHHLL HLHLHHLHHLHLHLHHLHHLLLLLLLLLLLLL HHHHHHHHHHHHHHHHHLLLHHHHHHHHLLLL -L -------------------------------- -------------------------------- // 174: [47c] XNOR(R11,R12,R13)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHLLLLLLL HHLHLLLHHHLLHHLHHLLLHHHHHHHHLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 175: [480] CMPEQC(R13,0x8ff0,R14)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHLLLLHLL LHHHLHHHHHHLHHHLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 176: [484] BNE(R14,0x490,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHLLHLLLL HHLLLLHHLHHHHHHHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 177: [490] ADDC(R31,0x1,R27)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHLLHLHLL HHHHLLHHHLLHHLHHLLLLLLLLLLHLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 178: [494] SHLC(R27,0x20,R28)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHLLHHLLL HHLHLLHHHLHHHHLLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 179: [498] CMPEQC(R28,0x1,R29)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHLLHHHLL LHHHLHHHHHHHHHLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 180: [49c] BNE(R29,0x4a8,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHLHLHLLL HHHHLLHHHLLHHLHHLLLLLLLLLLLHHHHH HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 181: [4a8] SHLC(R27,0x1f,R28)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHLHLHHLL HHHHHLHHLHLHHHLLLLLLLLLLLLLHLLLH HHHHHHHHHHHHHHHHHHLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 182: [4ac] SRAC(R28,0x11,R26)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHLHHLLLL HHLHLLHHLLHHHLHLHHLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 183: [4b0] CMPEQC(R26,0xc000,R25)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHLHHLHLL LHHHLHHHHHHHHLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 184: [4b4] BNE(R25,0x4c0,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHHLLLLLL HHHHLHHHLHLHHHLLLLLLLLLLLLLHLLLH LLLLLLLLLLLLLLLLLHLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 185: [4c0] SHRC(R28,0x11,R26)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHHLLLHLL HHLHLLHHLLHHHLHLLHLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 186: [4c4] CMPEQC(R26,0x4000,R25)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHHLLHLLL LHHHLHHHHHHHHLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 187: [4c8] BNE(R25,0x4d4,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHHLHLHLL HHLLLLHHHHLHHHHHLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 188: [4d4] ADDC(R31,0x0,R30)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHHLHHLLL HHLLLLLLLLHHHHHHLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 189: [4d8] ADDC(R31,0x0,R1)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHHLHHHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL -------------------------------- -L -------------------------------- -------------------------------- // 190: [4dc] illop op=0b000000\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 191: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 192: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 193: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 194: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 195: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHHHLLLLL HHHHLLHHHHLHHHHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLHLLHHHLLLLLL -L -------------------------------- -------------------------------- // 196: [4e0] SHLC(R30,0x1,R30)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHHHLLHLL HHHHLHHHHHLHHHHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLHLLHHHLLLLL -L -------------------------------- -------------------------------- // 197: [4e4] SHRC(R30,0x1,R30)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHHHLHLLL HHLHLLLLLLLHHHHLLLLLLHLLHHHLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 198: [4e8] CMPEQC(R30,0x4e0,R0)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHHHLHHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 199: [4ec] BNE(R0,0x4f8,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHHHHHLLL LLLLLHLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 200: [4f8] illop op=0b000001\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 201: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 202: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 203: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHL -L -------------------------------- -------------------------------- // 204: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 205: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLLHHHHHHLL LLLLHLLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 206: [4fc] illop op=0b000010\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 207: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 208: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 209: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHH -L -------------------------------- -------------------------------- // 210: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 211: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLLLLLLLL LLLLHHLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 212: [500] illop op=0b000011\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 213: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 214: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 215: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL -L -------------------------------- -------------------------------- // 216: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 217: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLLLLLHLL LLLHLLLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 218: [504] illop op=0b000100\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 219: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 220: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 221: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLH -L -------------------------------- -------------------------------- // 222: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 223: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLLLLHLLL LLLHLHLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 224: [508] illop op=0b000101\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 225: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 226: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 227: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHL -L -------------------------------- -------------------------------- // 228: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 229: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLLLLHHLL LLLHHLLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 230: [50c] illop op=0b000110\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 231: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 232: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 233: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHH -L -------------------------------- -------------------------------- // 234: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 235: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLLLHLLLL LLLHHHLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 236: [510] illop op=0b000111\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 237: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 238: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 239: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLL -L -------------------------------- -------------------------------- // 240: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 241: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLLLHLHLL LLHLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 242: [514] illop op=0b001000\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 243: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 244: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 245: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLH -L -------------------------------- -------------------------------- // 246: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 247: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLLLHHLLL LLHLLHLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 248: [518] illop op=0b001001\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 249: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 250: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 251: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLHL -L -------------------------------- -------------------------------- // 252: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 253: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLLLHHHLL LLHLHLLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 254: [51c] illop op=0b001010\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 255: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 256: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 257: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLHH -L -------------------------------- -------------------------------- // 258: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 259: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLLHLLLLL LLHLHHLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 260: [520] illop op=0b001011\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 261: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 262: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 263: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHLL -L -------------------------------- -------------------------------- // 264: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 265: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLLHLLHLL LLHHLLLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 266: [524] illop op=0b001100\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 267: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 268: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 269: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHLH -L -------------------------------- -------------------------------- // 270: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 271: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLLHLHLLL LLHHLHLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 272: [528] illop op=0b001101\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 273: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 274: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 275: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHL -L -------------------------------- -------------------------------- // 276: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 277: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLLHLHHLL LLHHHLLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 278: [52c] illop op=0b001110\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 279: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 280: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 281: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHH -L -------------------------------- -------------------------------- // 282: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 283: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLLHHLLLL LLHHHHLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 284: [530] illop op=0b001111\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 285: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 286: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 287: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLL -L -------------------------------- -------------------------------- // 288: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 289: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLLHHLHLL LHLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 290: [534] illop op=0b010000\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 291: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 292: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 293: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLH -L -------------------------------- -------------------------------- // 294: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 295: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLLHHHLLL LHLLLHLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 296: [538] illop op=0b010001\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 297: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 298: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 299: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLHL -L -------------------------------- -------------------------------- // 300: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 301: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLLHHHHLL LHLLHLLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 302: [53c] illop op=0b010010\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 303: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 304: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 305: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLHH -L -------------------------------- -------------------------------- // 306: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 307: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLHLLLLLL LHLLHHLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 308: [540] illop op=0b010011\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 309: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 310: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 311: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL -L -------------------------------- -------------------------------- // 312: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 313: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLHLLLHLL LHLHLLLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 314: [544] illop op=0b010100\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 315: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 316: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 317: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLH -L -------------------------------- -------------------------------- // 318: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 319: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLHLLHLLL LHLHLHLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 320: [548] illop op=0b010101\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 321: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 322: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 323: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHHL -L -------------------------------- -------------------------------- // 324: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 325: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLHLLHHLL LHLHHLLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 326: [54c] illop op=0b010110\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 327: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 328: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 329: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHHH -L -------------------------------- -------------------------------- // 330: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 331: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLHLHLLLL LHLHHHLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 332: [550] illop op=0b010111\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 333: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 334: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 335: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL -L -------------------------------- -------------------------------- // 336: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 337: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLHLHLHLL LHHLHLLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 338: [554] illop op=0b011010\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 339: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 340: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 341: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLH -L -------------------------------- -------------------------------- // 342: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 343: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLHLHHLLL LHHHHLLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 344: [558] illop op=0b011110\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 345: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 346: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 347: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLHL -L -------------------------------- -------------------------------- // 348: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 349: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLHLHHHLL HLLHHHLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 350: [55c] illop op=0b100111\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 351: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 352: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 353: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLHH -L -------------------------------- -------------------------------- // 354: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 355: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLHHLLLLL HLHHHHLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 356: [560] illop op=0b101111\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 357: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 358: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 359: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHLL -L -------------------------------- -------------------------------- // 360: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 361: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLHHLLHLL HHLHHHLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 362: [564] illop op=0b110111\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 363: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 364: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 365: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHLH -L -------------------------------- -------------------------------- // 366: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 367: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLHHLHLLL HHHHHHLLLLLLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 368: [568] illop op=0b111111\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 369: [004] BEQ(R31,0x14,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL HHLHLLLLLLLHHHHLLLLLLLLLLLLLLHLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 370: [014] CMPEQC(R30,0x4,R0)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 371: [018] BEQ(R0,0x24,R31)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLLHLL HHLLLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHHL -L -------------------------------- -------------------------------- // 372: [024] ADDC(R1,0x1,R1)\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 373: [028] JMP(R30,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLHHLHHLL HHLHLLLLLLLLLLLHLLLLLLLLLLLHHHHL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 374: [56c] CMPEQC(R1,0x1e,R0)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLHHHLLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 375: [570] BNE(R0,0x57c,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHLHHHHHLL HHLLLLLLHLLHHHHHLLLLLHHLHHHLHLLL LLLLLLLLLLLLLLLLLLLLLHHLHHHLHLLL -L -------------------------------- -------------------------------- // 376: [57c] ADDC(R31,0x6e8,R4)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHLLLLLLL LHHHHHLHLLHHHHHHLLLLLLLLLHLHLHHH LLLLLLLLLLLLLLLLLLLLLHHLHHHLLLLL HL HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL -------------------------------- // 377: [580] LDR(0x6e0,R9)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHLLLLHLL HHHLHLLLLLLLHLLHHHHHHHHHHHHHHHHH LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH -L -------------------------------- -------------------------------- // 378: [584] XORC(R9,0xffff,R0)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHLLLHLLL LHHLLHLHLLHLLHLLLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLHHLHHHLHLLL LH -------------------------------- HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL // 379: [588] ST(R9,0x0,R4)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHLLLHHLL LHHLLHLLLLLHHHHHLLLLLHHLHHHLHHLL LLLLLLLLLLLLLLLLLLLLLHHLHHHLHHLL LH -------------------------------- LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH // 380: [58c] ST(R0,0x6ec,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHLLHLLLL LHHLLHLHLLHLLHLLLLLLLLLLLLLLHLLL LLLLLLLLLLLLLLLLLLLLLHHLHHHHLLLL LH -------------------------------- HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL // 381: [590] ST(R9,0x8,R4)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHLLHLHLL LHHLLHLLLLLHHHHHLLLLLHHLHHHHLHLL LLLLLLLLLLLLLLLLLLLLLHHLHHHHLHLL LH -------------------------------- LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH // 382: [594] ST(R0,0x6f4,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHLLHHLLL LHHLLLLLHHLLLHLLLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLHHLHHHLHLLL HL HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL -------------------------------- // 383: [598] LD(R4,0x0,R6)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHLLHHHLL LHHHHHLLHLHHHHHHLLLLLLLLLHLHLLLH LLLLLLLLLLLLLLLLLLLLLHHLHHHLLHLL HL LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH -------------------------------- // 384: [59c] LDR(0x6e4,R5)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHLHLLLLL HLLHLLLLLLLLLHHLLHLLHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 385: [5a0] CMPEQ(R6,R9,R0)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHLHLLHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 386: [5a4] BNE(R0,0x5b0,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHLHHLLLL LHHLLLLLHHHHHHHHLLLLLHHLHHHLHHLL LLLLLLLLLLLLLLLLLLLLLHHLHHHLHHLL HL LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH -------------------------------- // 387: [5b0] LD(R31,0x6ec,R7)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHLHHLHLL HLLHLLLLLLLLLHHHLLHLHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 388: [5b4] CMPEQ(R7,R5,R0)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHLHHHLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 389: [5b8] BNE(R0,0x5c4,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHHLLLHLL LHHLLLLHLLLLLHLLLLLLLLLLLLLLHLLL LLLLLLLLLLLLLLLLLLLLLHHLHHHHLLLL HL HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL -------------------------------- // 390: [5c4] LD(R4,0x8,R8)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHHLLHLLL HLLHLLLLLLLLHLLLLHLLHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 391: [5c8] CMPEQ(R8,R9,R0)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHHLLHHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 392: [5cc] BNE(R0,0x5d8,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHHLHHLLL LHHLLLLHLLHHHHHHLLLLLHHLHHHHLHLL LLLLLLLLLLLLLLLLLLLLLHHLHHHHLHLL HL LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH -------------------------------- // 393: [5d8] LD(R31,0x6f4,R9)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHHLHHHLL HLLHLLLLLLLLHLLHLLHLHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 394: [5dc] CMPEQ(R9,R5,R0)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHHHLLLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 395: [5e0] BNE(R0,0x5ec,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHHHLHHLL HLLLLLLLLLLHHHHHHLHLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL -L -------------------------------- -------------------------------- // 396: [5ec] ADD(R31,R20,R0)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHHHHLLLL HLLLLLLLLLHLLLLLLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL -L -------------------------------- -------------------------------- // 397: [5f0] ADD(R0,R0,R1)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHHHHLHLL HLLLLLLLLHLLLLLLLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL -L -------------------------------- -------------------------------- // 398: [5f4] ADD(R0,R0,R2)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHHHHHLLL HLLLLLLLLHHLLLLLLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL -L -------------------------------- -------------------------------- // 399: [5f8] ADD(R0,R0,R3)\n00 HLLLLLLLLLLLLLLLLLLLLHLHHHHHHHLL HLLLLLLLHLLLLLLLLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLHLHLLL -L -------------------------------- -------------------------------- // 400: [5fc] ADD(R0,R0,R4)\n00 HLLLLLLLLLLLLLLLLLLLLHHLLLLLLLLL HLLLLLLLHLHLLLLHLLLHLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLHLHLLLL -L -------------------------------- -------------------------------- // 401: [600] ADD(R1,R2,R5)\n00 HLLLLLLLLLLLLLLLLLLLLHHLLLLLLHLL HLLLLLLLHLHLLLHHLLHLHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLHHHHLLL -L -------------------------------- -------------------------------- // 402: [604] ADD(R3,R5,R5)\n00 HLLLLLLLLLLLLLLLLLLLLHHLLLLLHLLL HLLLLLLLHLHLLHLLLLHLHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLHLHLLLLL -L -------------------------------- -------------------------------- // 403: [608] ADD(R4,R5,R5)\n00 HLLLLLLLLLLLLLLLLLLLLHHLLLLLHHLL HHLHLLLLLLLLLHLHLLLLLLLLHLHLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 404: [60c] CMPEQC(R5,0xa0,R0)\n00 HLLLLLLLLLLLLLLLLLLLLHHLLLLHLLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 405: [610] BNE(R0,0x61c,R31)\n00 HLLLLLLLLLLLLLLLLLLLLHHLLLLHHHLL LHHHLHLLLLLHHHHHLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 406: [61c] BNE(R31,0x620,R0)\n00 HLLLLLLLLLLLLLLLLLLLLHHLLLHLLLLL HLLLLLLLLLHLLLLLLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLHHLLLHLLLLLL -L -------------------------------- -------------------------------- // 407: [620] ADD(R0,R0,R1)\n00 HLLLLLLLLLLLLLLLLLLLLHHLLLHLLHLL HLLLLLLLLHLLLLLLLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLHHLLLHLLLLLL -L -------------------------------- -------------------------------- // 408: [624] ADD(R0,R0,R2)\n00 HLLLLLLLLLLLLLLLLLLLLHHLLLHLHLLL HLLLLLLLLHHLLLLLLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLHHLLLHLLLLLL -L -------------------------------- -------------------------------- // 409: [628] ADD(R0,R0,R3)\n00 HLLLLLLLLLLLLLLLLLLLLHHLLLHLHHLL HLLLLLLLHLLLLLLLLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLHHLLLHLLLLLL -L -------------------------------- -------------------------------- // 410: [62c] ADD(R0,R0,R4)\n00 HLLLLLLLLLLLLLLLLLLLLHHLLLHHLLLL HLLLLLLLHLHLLLLHLLLHLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLHHLLLHLLLLLLL -L -------------------------------- -------------------------------- // 411: [630] ADD(R1,R2,R5)\n00 HLLLLLLLLLLLLLLLLLLLLHHLLLHHLHLL HLLLLLLLHLHLLLHHLLHLHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLHLLHLLHHLLLLLL -L -------------------------------- -------------------------------- // 412: [634] ADD(R3,R5,R5)\n00 HLLLLLLLLLLLLLLLLLLLLHHLLLHHHLLL HLLLLLLLHLHLLHLLLLHLHLLLLLLLLLLL LLLLLLLLLLLLLLLLLLHHLLLHLLLLLLLL -L -------------------------------- -------------------------------- // 413: [638] ADD(R4,R5,R5)\n00 HLLLLLLLLLLLLLLLLLLLLHHLLLHHHHLL HHLHLLLLLLLLLHLHLLHHLLLHLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 414: [63c] CMPEQC(R5,0x3100,R0)\n00 HLLLLLLLLLLLLLLLLLLLLHHLLHLLLLLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 415: [640] BNE(R0,0x64c,R31)\n01 HLLLLLLLLLLLLLLLLLLLLHHLLHLLHHLL HHLLLLLLLLLHHHHHLLLLLHHLLHLHLHLL LLLLLLLLLLLLLLLLLLLLLHHLLHLHLHLL -L -------------------------------- -------------------------------- // 416: [64c] ADDC(R31,0x654,R0)\n00 HLLLLLLLLLLLLLLLLLLLLHHLLHLHLLLL LHHLHHHHHHHLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 417: [650] JMP(R0,R31)\n01 LLLLLLLLLLLLLLLLLLLLLHHLLHLHLHLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLLH -------------------------------- -L -------------------------------- -------------------------------- // 418: interrupt\n00 HLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLL LHHLHHHHHHHHHHHLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 419: [008] JMP(R30,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLLHLHHLLL LHHHLLHHHHHHHHHHLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 420: [658] BEQ(R31,0x668,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLLHHLHLLL HHLHLLLLLLLHHHHLLLLLLHHLLHLHHLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 421: [668] CMPEQC(R30,0x658,R0)\n00 LLLLLLLLLLLLLLLLLLLLLHHLLHHLHHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 422: [66c] BNE(R0,0x678,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLLHHHHLLL HHLLLLLLLLLHHHHHLLLLLHHLHLLLHHLL LLLLLLLLLLLLLLLLLLLLLHHLHLLLHHLL -L -------------------------------- -------------------------------- // 423: [678] ADDC(R31,0x68c,R0)\n00 LLLLLLLLLLLLLLLLLLLLLHHLLHHHHHLL HHLLLLLLLLHHHHHHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 424: [67c] ADDC(R31,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHLLLLLLL HHHHLLLLLLHLLLLHLLLLLLLLLLLHHHHH HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 425: [680] SHLC(R1,0x1f,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHLLLLHLL HLHLLHLLLLLLLLLHLLLLLLLLLLLLLLLL HLLLLLLLLLLLLLLLLLLLLHHLHLLLHHLL -L -------------------------------- -------------------------------- // 426: [684] OR(R1,R0,R0)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHLLLHLLL LHHLHHLLLLHLLLLLLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 427: [688] JMP(R0,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHLLLHHLL LHHHLLLLLLLHHHHHLLLLLLLLLLLLLLLL -------------------------------- -L -------------------------------- -------------------------------- // 428: [68c] BEQ(R31,0x690,R0)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHLLHLLLL HHLHLLLLLLHLLLLLLLLLLHHLHLLHLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 429: [690] CMPEQC(R0,0x690,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHLLHLHLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 430: [694] BNE(R1,0x6a0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHLHLLLLL LHHLLLLLLLLHHHHHLLLLLHHLHHHLLLLL LLLLLLLLLLLLLLLLLLLLLHHLHHHLLLLL HL HLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL -------------------------------- // 431: [6a0] LD(R31,0x6e0,R0)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHLHLLHLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLHHH -------------------------------- -L -------------------------------- -------------------------------- // 432: [6a4] BEQ(R0,0x6c4,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHLHLHLLL LHHLLLLLLLLHHHHHLLLLLHHLHHHLLHLL LLLLLLLLLLLLLLLLLLLLLHHLHHHLLHLL HL LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH -------------------------------- // 433: [6a8] LD(R31,0x6e4,R0)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHLHLHHLL LHHHLLHHHHHLLLLLLLLLLLLLLLLLLHLH -------------------------------- -L -------------------------------- -------------------------------- // 434: [6ac] BEQ(R0,0x6c4,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHLHHLLLL HHLLLLLLLLLHHHHHLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 435: [6b0] ADDC(R31,0x0,R0)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHLHHLHLL LHHHLHHHHHHLLLLLLLLLLLLLLLLLLLHH -------------------------------- -L -------------------------------- -------------------------------- // 436: [6b4] BNE(R0,0x6c4,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHLHHHLLL HHLLLLLLLLHHHHHHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 437: [6b8] ADDC(R31,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHLHHHHLL HHLLLLLLLHLHHHHHLLLLLLLLLLHLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLHLLLLL -L -------------------------------- -------------------------------- // 438: [6bc] ADDC(R31,0x20,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 439: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHL -L -------------------------------- -------------------------------- // 440: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHHH -L -------------------------------- -------------------------------- // 441: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 442: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 443: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL -L -------------------------------- -------------------------------- // 444: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHHL -L -------------------------------- -------------------------------- // 445: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 446: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 447: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLL -L -------------------------------- -------------------------------- // 448: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHLH -L -------------------------------- -------------------------------- // 449: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 450: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 451: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLL -L -------------------------------- -------------------------------- // 452: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHHLL -L -------------------------------- -------------------------------- // 453: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 454: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 455: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLHLLLLL -L -------------------------------- -------------------------------- // 456: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLHH -L -------------------------------- -------------------------------- // 457: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 458: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 459: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLHLLLLLL -L -------------------------------- -------------------------------- // 460: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLHL -L -------------------------------- -------------------------------- // 461: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 462: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 463: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLHLLLLLLL -L -------------------------------- -------------------------------- // 464: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLH -L -------------------------------- -------------------------------- // 465: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 466: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 467: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLHLLLLLLLL -L -------------------------------- -------------------------------- // 468: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHHLLL -L -------------------------------- -------------------------------- // 469: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 470: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 471: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLHLLLLLLLLL -L -------------------------------- -------------------------------- // 472: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHHH -L -------------------------------- -------------------------------- // 473: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 474: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 475: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLHLLLLLLLLLL -L -------------------------------- -------------------------------- // 476: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHHL -L -------------------------------- -------------------------------- // 477: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 478: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 479: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLHLLLLLLLLLLL -L -------------------------------- -------------------------------- // 480: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLH -L -------------------------------- -------------------------------- // 481: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 482: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 483: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLHLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 484: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLHLL -L -------------------------------- -------------------------------- // 485: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 486: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 487: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLHLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 488: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLHH -L -------------------------------- -------------------------------- // 489: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 490: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 491: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLHLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 492: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLHL -L -------------------------------- -------------------------------- // 493: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 494: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 495: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLHLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 496: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLH -L -------------------------------- -------------------------------- // 497: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 498: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 499: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLHLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 500: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLL -L -------------------------------- -------------------------------- // 501: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 502: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 503: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLHLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 504: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHH -L -------------------------------- -------------------------------- // 505: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 506: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 507: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLHLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 508: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHL -L -------------------------------- -------------------------------- // 509: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 510: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 511: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLHLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 512: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHLH -L -------------------------------- -------------------------------- // 513: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 514: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 515: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLHLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 516: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHHLL -L -------------------------------- -------------------------------- // 517: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 518: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 519: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLHLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 520: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLHH -L -------------------------------- -------------------------------- // 521: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 522: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 523: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLHLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 524: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLHL -L -------------------------------- -------------------------------- // 525: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 526: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 527: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLHLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 528: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLH -L -------------------------------- -------------------------------- // 529: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 530: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 531: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLHLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 532: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLL -L -------------------------------- -------------------------------- // 533: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 534: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 535: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLHLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 536: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHH -L -------------------------------- -------------------------------- // 537: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 538: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 539: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLHLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 540: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHL -L -------------------------------- -------------------------------- // 541: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 542: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 543: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLHLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 544: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLH -L -------------------------------- -------------------------------- // 545: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 546: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 547: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLHLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 548: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLL -L -------------------------------- -------------------------------- // 549: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 550: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 551: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLHLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 552: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHH -L -------------------------------- -------------------------------- // 553: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 554: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 555: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LHLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 556: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHL -L -------------------------------- -------------------------------- // 557: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 558: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 559: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 560: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH -L -------------------------------- -------------------------------- // 561: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 562: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLLLLL LHHHLHHHHHHLLLLHLLLLLLLLLLLLLLHL -------------------------------- -L -------------------------------- -------------------------------- // 563: [6c0] BNE(R1,0x6cc,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLLHHLL HHHHLLLLLLHLLLLHLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 564: [6cc] SHLC(R1,0x1,R1)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLLLL HHLLLHLLLHLLLLHLLLLLLLLLLLLLLLLH LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 565: [6d0] SUBC(R2,0x1,R2)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHLHLL LHHHLHHHHHHLLLHLHHHHHHHHHHHHHLHL -------------------------------- -L -------------------------------- -------------------------------- // 566: [6d4] BNE(R2,0x6c0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHHLLL HHLLLLHHHHHHHHHHLLLLLLLLLLLLLLLL LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL -L -------------------------------- -------------------------------- // 567: [6d8] ADDC(R31,0x0,R31)\n00 LLLLLLLLLLLLLLLLLLLLLHHLHHLHHHLL LHHHLLHHHHHHHHHHHHHHHHHHHHHHHHHL -------------------------------- -L -------------------------------- -------------------------------- // 568: [6dc] BEQ(R31,0x6d8,R31)\n\n.plotdef reg R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29 R30 R31\n\n.plotdef op ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? LD ST ??? JMP BEQ BNE ??? LDR ADD SUB MUL DIV CMPEQ CMPLT CMPLE ??? AND OR XOR XNOR SHL SHR SRA ??? ADDC SUBC MULC DIVC CMPEQC CMPLTC CMPLEC ??? ANDC ORC XORC XNORC SHLC SHRC SRAC ???\n\n.plot clk\n.plot reset\n.plot irq\n.plot X(ia[31:0])\n.plot X(id[31:0])\n.plot op(id[31:26])\n.plot reg(id[20:16])\n.plot reg(id[15:11])\n.plot reg(id[25:21])\n.plot X(ma[31:0])\n.plot moe\n.plot X(mrd[31:0])\n.plot mwr\n.plot X(mwd[31:0])\n"]]} } }

The goal of this lab is to complete the design of the Beta. We'll start by working on the three major subassemblies called out in the block diagram shown below: register file, control logic, and program counter. Once those modules pass their tests, we'll work on the Beta itself, adding the ALU design from Lab 3 and the various muxes that select how the data is routed between the units.

There are design notes below suggesting how to go about the design of each of the sub-modules.

Your first step is to copy over the ALU modules you designed in Lab 3 so that we can use your ALU in the Beta. Here's what you need to do:

  1. In another browser window open up the "32-bit ALU" exercise and scroll down to the Jade window in Problem 1. In the module toolbar at the top of the Jade window, click on to copy your /alu modules onto the module clipboard.

  2. Returning to this window, in the module toolbar below, click on , which will pop up a window to let you select which modules to copy into the "Building the Beta" workspace. Select all the /alu modules and click "OK", which will add the selected modules to your parts bin.

  3. Double-check that everything's okay by editing /alu/alu (use the Module: selection box in the module toolbar) and re-running the tests. Hopefully the tests will pass and you're good to go!

Here are some step-by-step design notes for tackling the Beta design.

Register File (REGFILE)

Using the module toolbar, select the /beta/regfile module to edit. The icon for the REGFILE module is shown on the right. The module's inputs are on the left, top, and right; its outputs are on the bottom. The block diagram for the module's internal circuitry is shown on the block diagram above.

The heart of the REGFILE module is a 3-port memory, built using the MEM component (found in the toolbar above the schematic diagram). Start your design by dragging an instance of the MEM component into your schematic then editing its properties to set the number of ports to 3, the width of the address to 5 (specifying 32 locations) and the width of the data to 32. Correctly configured, the MEM component icon should look like the one shown on the right below. Note that the CLK inputs are labeled with the triangle symbol we use to indicate an input triggered by a 0→1 transition.

Two of the ports are used from reading values from the memory. A read port is configured by setting the port's OE input to 1 (connect it to a wire labeled 1'1) and the WE and CLK inputs to 0 (connect them to wires labeled 0'1).

The third port is used for writing values into the memory. A write port is configured by setting the OE to 0 and connecting the WE and CLK to the appropriate signals. A write will occur on the rising edge of the CLK input if the WE input is a 1.

Now add the RA2SEL and WASEL address muxes to the select the addresses for the second read port and the write port. The WASEL mux input labeled XP in the block diagram is indicating the address of the XP register, i.e., register 30.

Hint: Remember that the default width of a wire is 1. The outputs of the RA2SEL and WASEL muxes should each be 5 bits wide, the width of a register address. So you'll need to set the widths of the wires connecting the MUX outputs to the memory, either by giving the wires names that implicitly specify a width, e.g., ADDR[4:0], or by setting the wire's width property to 5.

Remember to set width of each wire if the width of the wire is greater than 1. Jade will "transmit" the width information along connected wire segments, so you'll only need to set the width somewhere along the wire's run.

Note that the memory component doesn't know that location 31 of the register file should always read as zero, so you'll have to add additional logic around the memory that makes this happen. You can use muxes or ANDs to force the register data for each read port to "0" when the port address is 0b11111 (i.e., R31). Note that the address for the second read port comes from the output of the RA2SEL mux, so that's the value that needs to be tested for that port.

When you're ready to test your circuit, click the green checkmark to run the provided tests that verify your circuit has the functionality described above. If an error is reported, look at the TEST aspect and read the comments associated with that particular test cycle.

Now would be a good time to save your work :)

Hint: What do I do when the tests fail?

The failure notification will tell you which signal failed verification and the simulated time at which the mismatch between the actual value and expected occurred. The tests are actually a sequence of 100ns testing cycles and the reported time will be at the end of one of the cycles when the output values are checked for correctness.

Move your mouse over the plot of the appropriate signal waveform until the vertical time cursor is approximately at the failure time. Then double-click to zoom in on the plots around that particular time; zoom in enough so that all the signals for that testing cycle are readable. Now you can figure out what the circuit was being asked to do for that particular test and, hopefully, deduce why your circuit is producing an incorrect output.

Control Logic (CTL)

Using the module toolbar, select the /beta/ctl module to edit. The icon for the PC module is shown on the right. The module's inputs are on the left, its outputs are on the right.

The heart of the CTL module is the control ROM, a 64-entry lookup table addressed by the 6-bit opcode field of the instruction OP[5:0], which outputs the appropriate values for the 18 control signals. The ROM can be constructed using MEM component configured to have one read port and with its Contents property initialized with the appropriate values (see the Control logic table in the Unpipelined Beta diagram). That diagram also has a table of ALUFN values that will be useful when filling in the ALUFN[5:0] values for each instruction.

The contents property should be a list of 64 18-bit values. You can use extra whitespace and the standard "//" and "/* ... */" comment conventions to make contents more readable. "+" and "_" can be used to separate subfields and will be ignored by the contents parser. You can use "?" to indicate a "don't care" value for a particular digit in a numeric value; it will be replaced by a 0 when Jade builds the ROM contents.

To get you started, we've provided a control ROM contents file which you can copy-and-paste into the contents property of the MEM component. You should then edit the control signal values specified for each of the 64 opcodes so that the ROM will generate the signals necessary for the Beta to correctly execute instructions with that particular opcode.

Hint: When editing a property you can enlarge the input field by clicking and dragging on the lower right-hand corner of the input field.

In this file the control signals have been set as if the corresponding opcode was an illegal instruction, i.e., using the ILLOP column of the Control logic table. The contents are formatted so that ALUFN[5] is the most-significant bit of the 18-bit output and WERF is the least-significant bit — see the comments in the file for the exact order of the signals in each binary value. There's an 18-bit binary value specifying the control signals for each of the 64 opcodes, listed in opcode order. There's a comment at the end of each line that indicates the opcode number and the corresponding Beta opcode, if any. Here's a small excerpt from the middle of the file:

// alufn[5:0]
// asel, bsel
// moe, mwr
// pcsel[2:0]
// ra2sel
// wasel, wdsel[1:0], werf
0b??????_??_?0_011_?_1001  // 0b100000 ADD
0b??????_??_?0_011_?_1001  // 0b100001 SUB
0b??????_??_?0_011_?_1001  // 0b100010 MUL
0b??????_??_?0_011_?_1001  // 0b100011 DIV
0b??????_??_?0_011_?_1001  // 0b100100 CMPEQ
0b??????_??_?0_011_?_1001  // 0b100101 CMPLT
0b??????_??_?0_011_?_1001  // 0b100110 CMPLE
0b??????_??_?0_011_?_1001  // 0b100111
The first 6 bits on a line specify the values for ALUFN[5:0], the next 2 bits specify the values for ASEL and BSEL, and so on.

Some of the outputs of the control ROM will have to be modified by external logic before connecting the appropriate output of the CTL module:

When you've completed the schematic for the CTL module, click on the green checkmark in the toolbar to run the provided tests. The tests ensure that all the functionlity described above is implemented correctly.

Program Counter (PC)

Using the module toolbar, select the /beta/pc module to edit. The icon for the PC module is shown on the right. The module's inputs are on the left, its outputs are on the right. The block diagram for the module's internal circuitry is shown on the block diagram above.

The heart of the PC module is the 32-bit register that holds the current value of the program counter, which is the address in main memory of the instruction to be executed in the current clock cycle, PC[31:0]. The high-order bit of the register, PC[31], is used as the supervisor bit. When the supervisor bit is 0, the Beta is in user mode, executing programs normally with interrupts enabled. When the supervisor bit is 1, the Beta is in supervisor mode (sometimes called kernel mode), executing kernel code with interrupts disabled.

The PC register can be built using the DREG component from the parts library. You should include hardware for the bottom two bits of the PC even though they are always 0; this will make debugging traces easier to interpret.

The 5-input 32-bit PCSEL multiplexer selects the value to be loaded into the PC register at next rising edge of the clock. Since the standard cell library doesn't have any 5-input multiplexers, you'll have to construct the logic that selects the next PC using a combination of other components. Remember to add a way to set the PC to 0x80000000 on reset. We'll use the RESET signal to force the PC to 0x80000000 during the first cycle of operation. We'll describe each of the PCSEL input values in more detail below.

The PC module contains two 32-bit adders, which you can build as ripple-carry adders using full-adder module you used in the Lab 3 in the ARITH module of the ALU.

Here are some more details about the five inputs to the PCSEL mux.

When you've completed the schematic for the PC module, click on the green checkmark in the toolbar to run the provided tests. The tests ensure that all the functionlity described above is implemented correctly.

Everything else

Now it's time to put it all together: using the module toolbar, select the /beta/beta module to edit. This implementation of the Beta subcircuit has the following terminals:

clk input clock (from test circuitry): a 10MHz square wave creating a 100ns clock period.
reset input reset (from test circuitry): set by the test circuitry to 1 until after the first rising edge of clk, then set to 0 to start the Beta running.
irq input interrupt request (from test circuitry): set by the test circuitry to 1 to interrupt execution of a running user-mode program (i.e. programs where PC[31] = 0), saving PC+4 in Reg[XP], and setting the PC to 0x80000008.
ia[31:0] outputs instruction address (PC[31:0] from the PC module): address of the next instruction to be executed. This sent to the first read port of main memory.
id[31:0] inputs instruction data (from test circuitry). After the appropriate propagation delay, the main memory will drive these signals with the contents of the memory location specified by ia[31:0].
ma[31:0] outputs memory data address (from ALU): address of data location in main memory to be read or written. This is sent to second read port of main memory.
mrd[31:0] inputs memory read data (from test circuitry): if moe is 1, the main memory will drive these signals with the contents of the memory location specified by ma[31:0].
moe output memory read data output enable (from control logic): should be set to 1 when the Beta want to read the contents of the memory location specified by ma[31:0].
mwd[31:0] outputs memory write data (from register file): if wr is 1, this is the data that will be written into memory location ma[31:0] at the end of the current cycle.
mwr output memory write enable (from control logic): Set to 1 when the Beta wants to store into the memory location specified by ma[31:0] at the end of the current cycle. NOTE: this signal should always have a valid logic value at the rising edge of CLK otherwise the contents of the memory will be erased. You'll need to take care in designing the logic that generates this signal — see the CTL section above for details.

Next step: add the appropriate components to the Beta schematic and create connections shown in the block diagram above. Note that the Instruction and Data memories (shown in grey) will be provided by the test circuitry and are not part of your Beta design. You'll need instances of your PC, CTL, REGFILE and ALU modules along with the following:

When you're ready to test your design, select the /beta/test module. This module contains an instance of your Beta module along with a 3-port main memory which has been initialized with the binary code for a test program that checks out your Beta's functionality. Click on the green checkmark to run the test, which will execute for 433 cycles, verifying the correct values on the Beta's outputs each cycle. The checks are made just before each rising clock edge, i.e., after the current instruction has been fetched and executed, but just before the result is written into the register file. Since ma[31:0] is actually just the output of the ALU, we're able to verify all the OP- and OPC-class instructions. If you get a verification error, check the instruction that has just finished executing at the time reported in the error message — the Beta has executed that instruction incorrectly for some reason.

Almost nobody's design executes the checkoff program correctly the first time — it will take some effort to debug your design, but stick with it. If you're stuck, get help from your fellow students or the course staff. When it works, congratulations! The design of a complete CPU at the gate level is a significant accomplishment. Of course, now the fun is just beginning — there are undoubtedly many ways you can make improvements, both large and small.

Good luck! By finishing you'll earn your very own "Beta Inside" sticker ☺

Appendix: Test program

The BSim instance below shows the Beta program used to test the functionality of your Beta implementation. You may find it useful to compare the cycle-by-cycle operation of your circuit with the cycle-by-cycle execution of the test program in the BSim simulator. Note that any changes you make below (e.g., adding breakpoints) will not be saved when leaving this window.

{ "initial_state": { "beta.uasm": "url:../exercises/beta.uasm" }, "state": {"Beta": "url:../exercises/beta/beta_test.uasm"} }

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